This paper describes a low-noise front-end readout circuit for CZT detectors based on TSMC 0.35 um mixed-single CMOS technology;mainly analyzes the noise model of the detector-preamplifier and presents the low-noise c...This paper describes a low-noise front-end readout circuit for CZT detectors based on TSMC 0.35 um mixed-single CMOS technology;mainly analyzes the noise model of the detector-preamplifier and presents the low-noise circuit schematic of charge sensitive preamplifier and shaper. Considering the parasitical influences, the circuit and layout-design are optimized to reduce noise. The preliminary simulation results show that, the equivalent noise charge (ENC) is 74 e﹣ (rms), noise slope is 9 e﹣/pF, power consumption is 2 mW, and non-linearity展开更多
The architecture of a multi-channel front-end system is important for realizing a high-resolution PET system. We propose a novel front-end readout electronic system with TDC to deal with time information for PET syste...The architecture of a multi-channel front-end system is important for realizing a high-resolution PET system. We propose a novel front-end readout electronic system with TDC to deal with time information for PET system which can easily design the timing control. Each channel consists of a charge preamplifier, slow/fast shaper, discriminator and an analog memory. There are an ADC and a TDC to process the energy information and time information for each channel at the same time. In this paper, the whole system signals flow is all simulated by MATLAB. The simulation results show that the proposed system can process slender current from the detector and achieve the energy and time information. The proposed architecture can be applied to high-resolution PET imaging systems with multi-channel ASICs.展开更多
In this paper, the design of a novel low-noise front-end readout circuit for Cadmium zinc telluride (CdZnTe) X-ray and γ-ray detectors is described. The front-end readout circuits include the charge sensitive amplifi...In this paper, the design of a novel low-noise front-end readout circuit for Cadmium zinc telluride (CdZnTe) X-ray and γ-ray detectors is described. The front-end readout circuits include the charge sensitive amplifier (CSA) and the CR-RC shaper is implemented in TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 4.9 mm × 2.2 mm. The simulation results show that, the noise performance is 46 electrons + 10 electrons/pF, and power consumption is 1.65 mW per channel.展开更多
Front-end readout electronics have been developed for silicon strip detectors at our institute. In this system an Application Specific Integrated Circuit （ASIC） ATHED is used to realize multi-channel energy and time...Front-end readout electronics have been developed for silicon strip detectors at our institute. In this system an Application Specific Integrated Circuit （ASIC） ATHED is used to realize multi-channel energy and time measurements. The slow control of ASIC chips is achieved by parallel port and the timing control signals of ASIC chips are implemented with the CPLD. The data acquisition is carried out with a PXI-DAQ card. The software has a user-friendly GUI developed with LabWindows/CVI in the Windows XP operating system. The test results show that the energy resolution is about 1.14% for alpha at 5.48 MeV and the maximum channel crosstalk of the system is 4.60%. The performance of the system is very reliable and is suitable for nuclear physics experiments.展开更多
An ultra-low power complementary metal-oxide-semiconductor （CMOS） front-end readout ASIC was developed for a portable digital radiation detector. The ASIC having a charge sensitive amplifier and a semi-Gaussian puls...An ultra-low power complementary metal-oxide-semiconductor （CMOS） front-end readout ASIC was developed for a portable digital radiation detector. The ASIC having a charge sensitive amplifier and a semi-Gaussian pulse-shaper was produced using the CSMC 0.5 μm DPDM process. The ENC noise of 363 e at 0 pF with a noise slope of 23 e/pF complies with the stringent low noise requirements. The peaking time was 250 ns at a 100 mV/fC conversion gain （detector capacitance is 20 pF）. By operating this frontend readout ASIC in the weak inversion region, the ultra-low power dissipation is only 0.1 mW/channel （3.0 V） Simulations and test results suggest that this design gives lower power consumption than the front-end readout ASICs working in the strong inversion and is appropriate for the portable digital radiation detectors.展开更多
The Cooling Storage Ring of the Heavy Ion Research Facility in Lanzhou(HIRFL-CSR)was constructed to study nuclear physics,atomic physics,interdisciplinary science,and related applications.The External Target Facility(...The Cooling Storage Ring of the Heavy Ion Research Facility in Lanzhou(HIRFL-CSR)was constructed to study nuclear physics,atomic physics,interdisciplinary science,and related applications.The External Target Facility(ETF)is located in the main ring of the HIRFL-CSR.The gamma detector of the ETF is built to measure emitted gamma rays with energies below 5 MeV in the center-of-mass frame and is planned to measure light fragments with energies up to 300 MeV.The readout electronics for the gamma detector were designed and commissioned.The readout electronics consist of thirty-two front-end cards,thirty-two readout control units(RCUs),one common readout unit,one synchronization&clock unit,and one sub-trigger unit.By using the real-time peak-detection algorithm implemented in the RCU,the data volume can be significantly reduced.In addition,trigger logic selection algorithms are implemented to improve the selection of useful events and reduce the data size.The test results show that the integral nonlinearity of the readout electronics is less than 1%,and the energy resolution for measuring the 60 Co source is better than 5.5%.This study discusses the design and performance of the readout electronics.展开更多
The Cooling Storage Ring(CSR)external-target experiment(CEE)will be the first large-scale nuclear physics experiment at the Heavy Ion Research Facility in Lanzhou(HIRFL).A beam monitor has been developed to monitor th...The Cooling Storage Ring(CSR)external-target experiment(CEE)will be the first large-scale nuclear physics experiment at the Heavy Ion Research Facility in Lanzhou(HIRFL).A beam monitor has been developed to monitor the beam status and to improve the reconstruction resolution of the primary vertex.Custom-designed pixel charge sensors,named TopmetalCEEv1,are employed in the detector to locate the position of each particle.Readout electronics for the beam monitor were designed,including front-end electronics utilizing the Topmetal-CEEv1 sensors,as well as a readout and control unit that communicates with the DAQ,trigger,and clock systems.A series of tests were performed to validate the functionality and performance of the system,including basic electronic verifications and responses toαparticles and heavy-ion beams.The results show that all designed functions of the readout electronics system work well,and this system could be used for beam monitoring in the CEE experiment.展开更多
Traditionally,a continuous-wave(CW)signal is used to simulate RF circuits during the design procedure,while the fabricated circuits are measured by modulated signals in the test phase,because modulated signals are use...Traditionally,a continuous-wave(CW)signal is used to simulate RF circuits during the design procedure,while the fabricated circuits are measured by modulated signals in the test phase,because modulated signals are used in reality.It is almost impossible to use a CW signal to predict system performances,such as error vector magnitude(EVM),bit error rate(BER),etc.,of a transceiver front-end when dealing with complex modulated signals.This paper develops an integrated system evaluation engine(ISEE)to evaluate the system performances of a transceiver front-end or its sub-circuits.This crossdomain simulation platform is based on Matlab,advanced design system(ADS),and Cadence simulators to link the baseband signals and transceiver frond-end.An orthogonal frequency division multiplex(OFDM)modem is implemented in Matlab for evaluating the system performances.The modulated baseband signal from Matlab is dynamically fed into ADS,which includes transceiver front-end for co-simulation.The sub-block circuits of the transceiver front-end can be implemented using ADS and Cadence simulators.After system-level circuit simulation in ADS,the output signal is dynamically delivered to Matlab for demodulation.To simplify the use of the co-simulation platform,a graphical user interface(GUI)is constructed using Matlab.The parameters of the OFDM signals can be easily reconfigured on the GUI to simulate RF circuits with different modulation schemes.To demonstrate the effectiveness of the ISEE,a 3.5 GHz power amplifier is simulated and characterized using 20 MHz 16-and 64-QAM OFDM signals.展开更多
The high-energy cosmic radiation detector(HERD)is a planned experimental instrument at the Chinese Space Station.The silicon charge detector(SCD),a subdetector in HERD,is used to detect cosmic-ray nuclei with a high c...The high-energy cosmic radiation detector(HERD)is a planned experimental instrument at the Chinese Space Station.The silicon charge detector(SCD),a subdetector in HERD,is used to detect cosmic-ray nuclei with a high charge resolution.In this study,we present a compact readout electronic system for the SCD that is designed for the HERD heavy-ion beam test.It comprises front-end readout electronics with 200 input channels as well as data acquisition and data management electronics.The test results showed that the SCD readout system had low noise with a silicon-strip detector connected.The dynamic range could be extended from 200 to 1200 fC,and the cosmic-ray test was performed as expected.展开更多
The development of low-cost,non-enzymatic glucose biosensors is crucial for advancing accessible diabetes management.This paper presents the experimental testing of an extended-gate field-effect transistor(EG-FET)that...The development of low-cost,non-enzymatic glucose biosensors is crucial for advancing accessible diabetes management.This paper presents the experimental testing of an extended-gate field-effect transistor(EG-FET)that uses a gold film as the sensing structure.The system innovatively employs a custom-designed inverting operational amplifier circuit for precise signal acquisition and an Arduino Nano platform for real-time data processing and visualization,eliminating the need for expensive laboratory equipment.At the core of the design is a depletion-mode MOSFET,whose current-voltage properties were characterized.The function of the sensor was demonstrated by testing its response to phosphate-buffered saline containing glucose at different concentrations.A clear modulation of the drain current in the linear region of the EG-FET was observed,and a preliminary analysis revealed a linear correlation between the output current and glucose concentration,indicating the system’s potential for quantitative detection.This study successfully validates the feasibility of a compact,cost-effective,and non-enzymatic EG-FET biosensing platform,establishing a solid foundation for future development of point-of-care diagnostic devices.展开更多
In response to the pain points of rapid iteration of front-end education technology,large differences in learner foundations,and a lack of practical scenarios,this paper combines generative artificial intelligence and...In response to the pain points of rapid iteration of front-end education technology,large differences in learner foundations,and a lack of practical scenarios,this paper combines generative artificial intelligence and AI agents to analyze the empowerment logic from three dimensions:knowledge ecology reconstruction,cognitive collaborative upgrading,and teaching methodology innovation.It explores its application scenarios in teaching and learning,sorts out challenges such as technology adaptation and learning dependence,and proposes paths such as building an exclusive AI ecosystem and optimizing the guidance mechanism of intelligent agents to provide support for the digital transformation of front-end education.展开更多
This study presents a low-noise,high-rate front-end readout application-specific integrated circuit(ASIC)designed for the electromagnetic calorimeter(ECAL)of the Super Tau-Charm Facility(STCF).To address the high back...This study presents a low-noise,high-rate front-end readout application-specific integrated circuit(ASIC)designed for the electromagnetic calorimeter(ECAL)of the Super Tau-Charm Facility(STCF).To address the high background-count rate in the STCF ECAL,the temporal features of signals are analyzed node-by-node along the chain of the analog front-end circuit.Then,the system is optimized to mitigate the pile-up effects and elevate the count rate to megahertz levels.First,a charge-sensitive amplifier(CSA)with a fast reset path is developed,enabling quick resetting when the output reaches the maximum amplitude.This prevents the CSA from entering a pulse-dead zone owing to amplifier saturation caused by the pile-up.Second,a high-order shaper with baseline holder circuits is improved to enhance the anti-pile-up capability while maintaining an effective noise-filtering performance.Third,a high-speed peak-detection and hold circuit with an asynchronous first-input-first-output buffer function is proposed to hold and read the piled-up signals of the shaper.The ASIC is designed and manufactured using a standard commercial 1P6M 0.18μm mixed-signal CMOS process with a chip area of 2.4 mm×1.6 mm.The measurement results demonstrate a dynamic range of 4–500 fC with a nonlinearity error below 1.5%.For periodically distributed input signals,a count rate of 1.5 MHz/Ch is achieved with a peak time of 360 ns,resulting in an equivalent noise charge(ENC)of 2500 e^(-)-.The maximum count rate is 4 MHz/Ch at a peak time of 120 ns.At a peak time of 1.68μs with a 270 pF external capacitance,the minimum ENC is 1966 e^(-)-,and the noise slope is 3.08 e^(-)-∕pF.The timing resolution is better than 125 ps at an input charge of 200 fC.The power consumption is 35 mW/Ch.展开更多
An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considera...An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considerations,an analog front-end is presented with novel architecture, high power conversion efficiency, low voltage, low power consumption, and high performance in an environment of noise and power fluctuation. The circuit is implemented in a Chartered 0.35μm standard CMOS process. The experimental results show that the chip can satisfy the design target well.展开更多
Novel schemes for a charge sensitive amplifier （CSA） and a CR-（RC）, semi-Gaussian shaper in a fully integrated CMOS readout circuit for particle detectors are presented. The CSA is designed with poly-resistors as ...Novel schemes for a charge sensitive amplifier （CSA） and a CR-（RC）, semi-Gaussian shaper in a fully integrated CMOS readout circuit for particle detectors are presented. The CSA is designed with poly-resistors as feedback components to reduce noise. Compared with conventional CSA, the input referred equivalent noise charge（ENC） is simulated to be reduced from 5036e to 2381e with a large detector capacitance of 150pF at the cost of 0.5V output swing loss. The CR-（RC）,semi-Gaussian shaper uses MOS transistors in the triode region in series with poly-resistors to compensate process variation without much linearity reduction.展开更多
This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optlc-fiber receivers. In order to overcome the problem of inadequate bandwidth caused by the large...This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optlc-fiber receivers. In order to overcome the problem of inadequate bandwidth caused by the large parasitical capacitor of CMOS photo-detectors,a regulated-cascode structure and noise optimization are used in the design of the transimpedance amplifier. The experimental results indicate that, with a parasitical capacitance of 2pF,a single channel is able to work at bite rates of up to 2.5Gb/s,and a clear eye diagram is obtained with a 0. 8mVpp input. Furthermore, an isolation structure combined with a p^＋ guard.ring （PGR）, an n^＋ guard-ring （NGR）,and a deep-n-well （DNW） for parallel amplifier is also presented. Taking this combined structure, the crosstalk and the substrate noise coupling have been effectively reduced. Compared with the isolation of PGR or PGR ＋ NGR,the measured results show that the isolation degree of this structure is improved by 29.2 and 8. ldB at 1GHz,and by 8. 1 and 2. 5dB at 2GHz,respectively. With a 1.8V supply,each channel of the front-end amplifier consumes a DC power of 85mW,and the total power consumption of 12 channels is about 1W.展开更多
The research performed analysis on patent applicant ranking, IPC, patent type and legal status in order to explore application and authorization of front-end industry chain dominated by planting, breeding, soil improv...The research performed analysis on patent applicant ranking, IPC, patent type and legal status in order to explore application and authorization of front-end industry chain dominated by planting, breeding, soil improvement and substrate culti- vation technologies. The results showed that research institutions and big tobacco enterprises play a leading role in the tobacco industry, for example, Yunnan Tobac- co Agricultural S＆T Research Institute and Guizhou Tobacco Agricultural S＆T Re- search Institute have a total of 26 patents; A01G subclass represents 58% of total patents, dominated by Yunnan Tobacco Agricultural S＆T Research Institute and Henan Agricultural University; there are only invention and practical use patents, of which invention patents represent 92%; authorized patents take up to 31% and in- valid patents represent 23%.展开更多
Based on an avalanche photodiode（ APD） detecting array working in Geiger mode（ GM-APD）, a high-performance infrared sensor readout integrated circuit（ ROIC） used for infrared 3D（ three-dimensional） imaging is ...Based on an avalanche photodiode（ APD） detecting array working in Geiger mode（ GM-APD）, a high-performance infrared sensor readout integrated circuit（ ROIC） used for infrared 3D（ three-dimensional） imaging is proposed. The system mainly consists of three functional modules, including active quenching circuit（ AQC）, time-to-digital converter（ TDC） circuit and other timing controller circuit. Each AQC and TDC circuit together constitutes the pixel circuit. Under the cooperation with other modules, the current signal generated by the GM-APD sensor is detected by the AQC, and the photon time-of-flight（ TOF） is measured and converted to a digital signal output to achieve a better noise suppression and a higher detection sensitivity by the TDC. The ROIC circuit is fabricated by the CSMC 0. 5 μm standard CMOS technology. The array size is 8 × 8, and the center distance of two adjacent cells is 100μm. The measurement results of the chip showthat the performance of the circuit is good, and the chip can achieve 1 ns time resolution with a 250 MHz reference clock, and the circuit can be used in the array structure of the infrared detection system or focal plane array（ FPA）.展开更多
A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly red...A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly reduced. Based on this exasperate antenna performance,a new rectifier with high power conversion efficiency and low turn-on voltage is presented. The circuit is implemented in an SMIC 0.18μm EEPROM process. Measurement results show that with a 120kΩ load,the power conversion efficiency reaches as high as 36%. For a sinusoidal wave with magnitude of 0. 5V, the output DC voltage reaches IV,which is high enough for RFID tags. The read distance is as far as 22cm.展开更多
In the future, the Very Large Area gamma-ray Space Telescope is expected to observe high-energy electrons and gamma rays in the MeV to TeV range with unprecedented acceptance. As part of the detector suite, a high-ene...In the future, the Very Large Area gamma-ray Space Telescope is expected to observe high-energy electrons and gamma rays in the MeV to TeV range with unprecedented acceptance. As part of the detector suite, a high-energy imaging calorimeter(HEIC) is currently being developed as a homogeneous calorimeter that utilizes long bismuth germanate(BGO) scintillation crystals as both absorbers and detectors. To accurately measure the energy deposition in the BGO bar of HEIC, a highdynamic-range readout method using a silicon photomultiplier(SiPM) and multiphotodiode(PD) with different active areas has been proposed. A prototype readout system that adopts multichannel charge measurement ASICs was also developed to read out the combined system of SiPMs and PDs. Preliminary tests confirmed the feasibility of the readout scheme, which is expected to have a dynamic range close to 10~6.展开更多
This paper presents a low noise, 1.25Gb/s and 124dBΩ front-end amplifier that is designed and fabricated in 0.25μm CMOS technology for optical communication applications. Active inductor shunt peaking technology and...This paper presents a low noise, 1.25Gb/s and 124dBΩ front-end amplifier that is designed and fabricated in 0.25μm CMOS technology for optical communication applications. Active inductor shunt peaking technology and noise optimization are used in the design of a trans-impedance amplifier,which overcomes the problem of inadequate bandwidth caused by the large parasitical capacitor of the CMOS photodiode. Experimental results indicate that with a parasitical capacitance of 2pF,this circuit works at 1.25Gb/s. A clear eye diagram is obtained with an input optical signal of - 17dBm. With a power supply of 3.3V, the front-end amplifier consumes 122mW and provides a 660mV differential output.展开更多
文摘This paper describes a low-noise front-end readout circuit for CZT detectors based on TSMC 0.35 um mixed-single CMOS technology;mainly analyzes the noise model of the detector-preamplifier and presents the low-noise circuit schematic of charge sensitive preamplifier and shaper. Considering the parasitical influences, the circuit and layout-design are optimized to reduce noise. The preliminary simulation results show that, the equivalent noise charge (ENC) is 74 e﹣ (rms), noise slope is 9 e﹣/pF, power consumption is 2 mW, and non-linearity
文摘The architecture of a multi-channel front-end system is important for realizing a high-resolution PET system. We propose a novel front-end readout electronic system with TDC to deal with time information for PET system which can easily design the timing control. Each channel consists of a charge preamplifier, slow/fast shaper, discriminator and an analog memory. There are an ADC and a TDC to process the energy information and time information for each channel at the same time. In this paper, the whole system signals flow is all simulated by MATLAB. The simulation results show that the proposed system can process slender current from the detector and achieve the energy and time information. The proposed architecture can be applied to high-resolution PET imaging systems with multi-channel ASICs.
文摘In this paper, the design of a novel low-noise front-end readout circuit for Cadmium zinc telluride (CdZnTe) X-ray and γ-ray detectors is described. The front-end readout circuits include the charge sensitive amplifier (CSA) and the CR-RC shaper is implemented in TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 4.9 mm × 2.2 mm. The simulation results show that, the noise performance is 46 electrons + 10 electrons/pF, and power consumption is 1.65 mW per channel.
基金Supported by National Natural Science Foundation of China(10735060 and 11005135)Important Direction Project of CAS Knowledge Innovation Program(KJCX2-YW-N27)
文摘Front-end readout electronics have been developed for silicon strip detectors at our institute. In this system an Application Specific Integrated Circuit （ASIC） ATHED is used to realize multi-channel energy and time measurements. The slow control of ASIC chips is achieved by parallel port and the timing control signals of ASIC chips are implemented with the CPLD. The data acquisition is carried out with a PXI-DAQ card. The software has a user-friendly GUI developed with LabWindows/CVI in the Windows XP operating system. The test results show that the energy resolution is about 1.14% for alpha at 5.48 MeV and the maximum channel crosstalk of the system is 4.60%. The performance of the system is very reliable and is suitable for nuclear physics experiments.
基金Supported by the National Natural Science Foundation of China(No. BK2007026)the 333 High-Level Personnel Training Project of Jiangsu Province (No. 2007124)
文摘An ultra-low power complementary metal-oxide-semiconductor （CMOS） front-end readout ASIC was developed for a portable digital radiation detector. The ASIC having a charge sensitive amplifier and a semi-Gaussian pulse-shaper was produced using the CSMC 0.5 μm DPDM process. The ENC noise of 363 e at 0 pF with a noise slope of 23 e/pF complies with the stringent low noise requirements. The peaking time was 250 ns at a 100 mV/fC conversion gain （detector capacitance is 20 pF）. By operating this frontend readout ASIC in the weak inversion region, the ultra-low power dissipation is only 0.1 mW/channel （3.0 V） Simulations and test results suggest that this design gives lower power consumption than the front-end readout ASICs working in the strong inversion and is appropriate for the portable digital radiation detectors.
基金supported by the National Natural Science Foundation of China (Nos. 12222512, 12375193, U2031206, U1831206, and U2032209)the Scientific Instrument Developing Project of the Chinese Academy of Sciences (GJJSTD20210009)+1 种基金the CAS Pioneer Hundred Talent Programthe CAS Light of West China Program
文摘The Cooling Storage Ring of the Heavy Ion Research Facility in Lanzhou(HIRFL-CSR)was constructed to study nuclear physics,atomic physics,interdisciplinary science,and related applications.The External Target Facility(ETF)is located in the main ring of the HIRFL-CSR.The gamma detector of the ETF is built to measure emitted gamma rays with energies below 5 MeV in the center-of-mass frame and is planned to measure light fragments with energies up to 300 MeV.The readout electronics for the gamma detector were designed and commissioned.The readout electronics consist of thirty-two front-end cards,thirty-two readout control units(RCUs),one common readout unit,one synchronization&clock unit,and one sub-trigger unit.By using the real-time peak-detection algorithm implemented in the RCU,the data volume can be significantly reduced.In addition,trigger logic selection algorithms are implemented to improve the selection of useful events and reduce the data size.The test results show that the integral nonlinearity of the readout electronics is less than 1%,and the energy resolution for measuring the 60 Co source is better than 5.5%.This study discusses the design and performance of the readout electronics.
基金supported by the National Natural Science Foundation of China(Nos.11927901,12105110,U2032209,12275105)the National Key Research and Development Program of China(Nos.2020YFE0202002,2022YFA1602103)the Fundamental Research Funds for the Central Universities(No.CCNU22QN005)。
文摘The Cooling Storage Ring(CSR)external-target experiment(CEE)will be the first large-scale nuclear physics experiment at the Heavy Ion Research Facility in Lanzhou(HIRFL).A beam monitor has been developed to monitor the beam status and to improve the reconstruction resolution of the primary vertex.Custom-designed pixel charge sensors,named TopmetalCEEv1,are employed in the detector to locate the position of each particle.Readout electronics for the beam monitor were designed,including front-end electronics utilizing the Topmetal-CEEv1 sensors,as well as a readout and control unit that communicates with the DAQ,trigger,and clock systems.A series of tests were performed to validate the functionality and performance of the system,including basic electronic verifications and responses toαparticles and heavy-ion beams.The results show that all designed functions of the readout electronics system work well,and this system could be used for beam monitoring in the CEE experiment.
基金supported by the Project of Hetao Shenzhen-Hong Kong Science and Technology Innovation Cooperation Zone(No.HZQB-KCZYB-2020083).
文摘Traditionally,a continuous-wave(CW)signal is used to simulate RF circuits during the design procedure,while the fabricated circuits are measured by modulated signals in the test phase,because modulated signals are used in reality.It is almost impossible to use a CW signal to predict system performances,such as error vector magnitude(EVM),bit error rate(BER),etc.,of a transceiver front-end when dealing with complex modulated signals.This paper develops an integrated system evaluation engine(ISEE)to evaluate the system performances of a transceiver front-end or its sub-circuits.This crossdomain simulation platform is based on Matlab,advanced design system(ADS),and Cadence simulators to link the baseband signals and transceiver frond-end.An orthogonal frequency division multiplex(OFDM)modem is implemented in Matlab for evaluating the system performances.The modulated baseband signal from Matlab is dynamically fed into ADS,which includes transceiver front-end for co-simulation.The sub-block circuits of the transceiver front-end can be implemented using ADS and Cadence simulators.After system-level circuit simulation in ADS,the output signal is dynamically delivered to Matlab for demodulation.To simplify the use of the co-simulation platform,a graphical user interface(GUI)is constructed using Matlab.The parameters of the OFDM signals can be easily reconfigured on the GUI to simulate RF circuits with different modulation schemes.To demonstrate the effectiveness of the ISEE,a 3.5 GHz power amplifier is simulated and characterized using 20 MHz 16-and 64-QAM OFDM signals.
基金supported by the CNSA program(D050102)National Natural Science Foundation of China(Nos.12061131007,12003038,42365006)Young Scientists Fund of the National Natural Science Foundation of China(No.11903037).
文摘The high-energy cosmic radiation detector(HERD)is a planned experimental instrument at the Chinese Space Station.The silicon charge detector(SCD),a subdetector in HERD,is used to detect cosmic-ray nuclei with a high charge resolution.In this study,we present a compact readout electronic system for the SCD that is designed for the HERD heavy-ion beam test.It comprises front-end readout electronics with 200 input channels as well as data acquisition and data management electronics.The test results showed that the SCD readout system had low noise with a silicon-strip detector connected.The dynamic range could be extended from 200 to 1200 fC,and the cosmic-ray test was performed as expected.
文摘The development of low-cost,non-enzymatic glucose biosensors is crucial for advancing accessible diabetes management.This paper presents the experimental testing of an extended-gate field-effect transistor(EG-FET)that uses a gold film as the sensing structure.The system innovatively employs a custom-designed inverting operational amplifier circuit for precise signal acquisition and an Arduino Nano platform for real-time data processing and visualization,eliminating the need for expensive laboratory equipment.At the core of the design is a depletion-mode MOSFET,whose current-voltage properties were characterized.The function of the sensor was demonstrated by testing its response to phosphate-buffered saline containing glucose at different concentrations.A clear modulation of the drain current in the linear region of the EG-FET was observed,and a preliminary analysis revealed a linear correlation between the output current and glucose concentration,indicating the system’s potential for quantitative detection.This study successfully validates the feasibility of a compact,cost-effective,and non-enzymatic EG-FET biosensing platform,establishing a solid foundation for future development of point-of-care diagnostic devices.
基金funded by two 2024 Ministry of Education supply-demand docking employment and education projects(Grant No.2024101679202,Grant No.2024121116066)2024“Innovation Strong Institute Project of Guangdong Polytechnic Institute”(Grant No.2024CQ-29)2022 Guangdong Province Undergraduate Online Open Course Guidance Committee Research Project(Grant No.2022ZXKC612).
文摘In response to the pain points of rapid iteration of front-end education technology,large differences in learner foundations,and a lack of practical scenarios,this paper combines generative artificial intelligence and AI agents to analyze the empowerment logic from three dimensions:knowledge ecology reconstruction,cognitive collaborative upgrading,and teaching methodology innovation.It explores its application scenarios in teaching and learning,sorts out challenges such as technology adaptation and learning dependence,and proposes paths such as building an exclusive AI ecosystem and optimizing the guidance mechanism of intelligent agents to provide support for the digital transformation of front-end education.
基金supported by the National Natural Science Foundation of China(Nos.12375191,12275218,12341502,12105224,12205307)National Key Research and Development Program of China(No.2023YFE0206300,2023YFF0719600)+2 种基金Guangdong Basic and Applied Basic Research Foundation(No.2024A1515012141)China Postdoctoral Science Foundation(No.2023M742850)Innovation Foundation for Doctor Dissertation of Northwestern Polytechnical University(No.CX2021025)。
文摘This study presents a low-noise,high-rate front-end readout application-specific integrated circuit(ASIC)designed for the electromagnetic calorimeter(ECAL)of the Super Tau-Charm Facility(STCF).To address the high background-count rate in the STCF ECAL,the temporal features of signals are analyzed node-by-node along the chain of the analog front-end circuit.Then,the system is optimized to mitigate the pile-up effects and elevate the count rate to megahertz levels.First,a charge-sensitive amplifier(CSA)with a fast reset path is developed,enabling quick resetting when the output reaches the maximum amplitude.This prevents the CSA from entering a pulse-dead zone owing to amplifier saturation caused by the pile-up.Second,a high-order shaper with baseline holder circuits is improved to enhance the anti-pile-up capability while maintaining an effective noise-filtering performance.Third,a high-speed peak-detection and hold circuit with an asynchronous first-input-first-output buffer function is proposed to hold and read the piled-up signals of the shaper.The ASIC is designed and manufactured using a standard commercial 1P6M 0.18μm mixed-signal CMOS process with a chip area of 2.4 mm×1.6 mm.The measurement results demonstrate a dynamic range of 4–500 fC with a nonlinearity error below 1.5%.For periodically distributed input signals,a count rate of 1.5 MHz/Ch is achieved with a peak time of 360 ns,resulting in an equivalent noise charge(ENC)of 2500 e^(-)-.The maximum count rate is 4 MHz/Ch at a peak time of 120 ns.At a peak time of 1.68μs with a 270 pF external capacitance,the minimum ENC is 1966 e^(-)-,and the noise slope is 3.08 e^(-)-∕pF.The timing resolution is better than 125 ps at an input charge of 200 fC.The power consumption is 35 mW/Ch.
文摘An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considerations,an analog front-end is presented with novel architecture, high power conversion efficiency, low voltage, low power consumption, and high performance in an environment of noise and power fluctuation. The circuit is implemented in a Chartered 0.35μm standard CMOS process. The experimental results show that the chip can satisfy the design target well.
文摘Novel schemes for a charge sensitive amplifier （CSA） and a CR-（RC）, semi-Gaussian shaper in a fully integrated CMOS readout circuit for particle detectors are presented. The CSA is designed with poly-resistors as feedback components to reduce noise. Compared with conventional CSA, the input referred equivalent noise charge（ENC） is simulated to be reduced from 5036e to 2381e with a large detector capacitance of 150pF at the cost of 0.5V output swing loss. The CR-（RC）,semi-Gaussian shaper uses MOS transistors in the triode region in series with poly-resistors to compensate process variation without much linearity reduction.
文摘This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optlc-fiber receivers. In order to overcome the problem of inadequate bandwidth caused by the large parasitical capacitor of CMOS photo-detectors,a regulated-cascode structure and noise optimization are used in the design of the transimpedance amplifier. The experimental results indicate that, with a parasitical capacitance of 2pF,a single channel is able to work at bite rates of up to 2.5Gb/s,and a clear eye diagram is obtained with a 0. 8mVpp input. Furthermore, an isolation structure combined with a p^＋ guard.ring （PGR）, an n^＋ guard-ring （NGR）,and a deep-n-well （DNW） for parallel amplifier is also presented. Taking this combined structure, the crosstalk and the substrate noise coupling have been effectively reduced. Compared with the isolation of PGR or PGR ＋ NGR,the measured results show that the isolation degree of this structure is improved by 29.2 and 8. ldB at 1GHz,and by 8. 1 and 2. 5dB at 2GHz,respectively. With a 1.8V supply,each channel of the front-end amplifier consumes a DC power of 85mW,and the total power consumption of 12 channels is about 1W.
基金Supported by Early Warning Analysis of Patent for Key Industries and key Fields in Yunnan Province~~
文摘The research performed analysis on patent applicant ranking, IPC, patent type and legal status in order to explore application and authorization of front-end industry chain dominated by planting, breeding, soil improvement and substrate culti- vation technologies. The results showed that research institutions and big tobacco enterprises play a leading role in the tobacco industry, for example, Yunnan Tobac- co Agricultural S＆T Research Institute and Guizhou Tobacco Agricultural S＆T Re- search Institute have a total of 26 patents; A01G subclass represents 58% of total patents, dominated by Yunnan Tobacco Agricultural S＆T Research Institute and Henan Agricultural University; there are only invention and practical use patents, of which invention patents represent 92%; authorized patents take up to 31% and in- valid patents represent 23%.
基金The Natural Science Foundation of Jiangsu Province(No.BK2012559)Qing Lan Project of Jiangsu Province
文摘Based on an avalanche photodiode（ APD） detecting array working in Geiger mode（ GM-APD）, a high-performance infrared sensor readout integrated circuit（ ROIC） used for infrared 3D（ three-dimensional） imaging is proposed. The system mainly consists of three functional modules, including active quenching circuit（ AQC）, time-to-digital converter（ TDC） circuit and other timing controller circuit. Each AQC and TDC circuit together constitutes the pixel circuit. Under the cooperation with other modules, the current signal generated by the GM-APD sensor is detected by the AQC, and the photon time-of-flight（ TOF） is measured and converted to a digital signal output to achieve a better noise suppression and a higher detection sensitivity by the TDC. The ROIC circuit is fabricated by the CSMC 0. 5 μm standard CMOS technology. The array size is 8 × 8, and the center distance of two adjacent cells is 100μm. The measurement results of the chip showthat the performance of the circuit is good, and the chip can achieve 1 ns time resolution with a 250 MHz reference clock, and the circuit can be used in the array structure of the infrared detection system or focal plane array（ FPA）.
文摘A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly reduced. Based on this exasperate antenna performance,a new rectifier with high power conversion efficiency and low turn-on voltage is presented. The circuit is implemented in an SMIC 0.18μm EEPROM process. Measurement results show that with a 120kΩ load,the power conversion efficiency reaches as high as 36%. For a sinusoidal wave with magnitude of 0. 5V, the output DC voltage reaches IV,which is high enough for RFID tags. The read distance is as far as 22cm.
基金Foundation of China (Nos. 12227805, U1831206, 12103095, 12235012, 12273120, and 11973097)the Scientific Instrument Developing Project of the Chinese Academy of Sciences (No. GJJSTD20210009)。
文摘In the future, the Very Large Area gamma-ray Space Telescope is expected to observe high-energy electrons and gamma rays in the MeV to TeV range with unprecedented acceptance. As part of the detector suite, a high-energy imaging calorimeter(HEIC) is currently being developed as a homogeneous calorimeter that utilizes long bismuth germanate(BGO) scintillation crystals as both absorbers and detectors. To accurately measure the energy deposition in the BGO bar of HEIC, a highdynamic-range readout method using a silicon photomultiplier(SiPM) and multiphotodiode(PD) with different active areas has been proposed. A prototype readout system that adopts multichannel charge measurement ASICs was also developed to read out the combined system of SiPMs and PDs. Preliminary tests confirmed the feasibility of the readout scheme, which is expected to have a dynamic range close to 10~6.
文摘This paper presents a low noise, 1.25Gb/s and 124dBΩ front-end amplifier that is designed and fabricated in 0.25μm CMOS technology for optical communication applications. Active inductor shunt peaking technology and noise optimization are used in the design of a trans-impedance amplifier,which overcomes the problem of inadequate bandwidth caused by the large parasitical capacitor of the CMOS photodiode. Experimental results indicate that with a parasitical capacitance of 2pF,this circuit works at 1.25Gb/s. A clear eye diagram is obtained with an input optical signal of - 17dBm. With a power supply of 3.3V, the front-end amplifier consumes 122mW and provides a 660mV differential output.
