In this study,we present an organic field-effect transistor floating-gate memory using polysilicon(poly-Si)as a charge trapping layer.The memory device is fabricated on a N^+-Si/SiO2 substrate.Poly-Si,polymethylmethac...In this study,we present an organic field-effect transistor floating-gate memory using polysilicon(poly-Si)as a charge trapping layer.The memory device is fabricated on a N^+-Si/SiO2 substrate.Poly-Si,polymethylmethacrylate,and pentacene are used as a floating-gate layer,tunneling layer,and active layer,respectively.The device shows bidirectional storage characteristics under the action of programming/erasing(P/E)operation due to the supplied electrons and holes in the channel and the bidirectional charge trapping characteristic of the poly-Si floating-gate.The carrier mobility and switching current ratio(Ion/Ioff ratio)of the device with a tunneling layer thickness of 85 nm are 0.01 cm^2·V^-1·s^-1 and 102,respectively.A large memory window of 9.28 V can be obtained under a P/E voltage of±60 V.展开更多
据西安电子科技大学网站,近日,西安电子科技大学杭州研究院(西电杭研院)韩根全教授课题组在铁电场效应晶体管(FeFET)存储和存算技术领域取得重要进展,相关研究成果以“Low-power Edge Detection Based on Ferroelectric Field-Effect Tr...据西安电子科技大学网站,近日,西安电子科技大学杭州研究院(西电杭研院)韩根全教授课题组在铁电场效应晶体管(FeFET)存储和存算技术领域取得重要进展,相关研究成果以“Low-power Edge Detection Based on Ferroelectric Field-Effect Transistor”为题发表于《自然·通讯》。展开更多
A much more sustainable,cost effective and very flexible process for manufacturing critical fibres based on ultra high molecular weight polyethylene(UHMWPE)is being launched by the UK’s Fibre Extrusion Technologies(F...A much more sustainable,cost effective and very flexible process for manufacturing critical fibres based on ultra high molecular weight polyethylene(UHMWPE)is being launched by the UK’s Fibre Extrusion Technologies(FET).展开更多
SOI CMOS技术存在许多优势,但由于存在厚的埋氧层,其总剂量效应反而比体Si器件更差,因此需进行总剂量抗辐射加固设计。对几种SOI MOSFET的栅氧、埋氧和场氧总剂量抗辐射加固的方法进行了对比较分析,指出了各自的优劣势,给出了研究方向...SOI CMOS技术存在许多优势,但由于存在厚的埋氧层,其总剂量效应反而比体Si器件更差,因此需进行总剂量抗辐射加固设计。对几种SOI MOSFET的栅氧、埋氧和场氧总剂量抗辐射加固的方法进行了对比较分析,指出了各自的优劣势,给出了研究方向。并对FLEXFET和G4-FET三维SOI器件抗辐射加固新结构进行了阐述,分析了其优越性。展开更多
文摘In this study,we present an organic field-effect transistor floating-gate memory using polysilicon(poly-Si)as a charge trapping layer.The memory device is fabricated on a N^+-Si/SiO2 substrate.Poly-Si,polymethylmethacrylate,and pentacene are used as a floating-gate layer,tunneling layer,and active layer,respectively.The device shows bidirectional storage characteristics under the action of programming/erasing(P/E)operation due to the supplied electrons and holes in the channel and the bidirectional charge trapping characteristic of the poly-Si floating-gate.The carrier mobility and switching current ratio(Ion/Ioff ratio)of the device with a tunneling layer thickness of 85 nm are 0.01 cm^2·V^-1·s^-1 and 102,respectively.A large memory window of 9.28 V can be obtained under a P/E voltage of±60 V.
文摘据西安电子科技大学网站,近日,西安电子科技大学杭州研究院(西电杭研院)韩根全教授课题组在铁电场效应晶体管(FeFET)存储和存算技术领域取得重要进展,相关研究成果以“Low-power Edge Detection Based on Ferroelectric Field-Effect Transistor”为题发表于《自然·通讯》。
文摘A much more sustainable,cost effective and very flexible process for manufacturing critical fibres based on ultra high molecular weight polyethylene(UHMWPE)is being launched by the UK’s Fibre Extrusion Technologies(FET).
