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Flip-chip芯片关键技术的研究 被引量:2
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作者 芮延年 刘开强 +1 位作者 张志伟 陈慧萍 《苏州大学学报(工科版)》 CAS 2004年第5期19-22,共4页
Flip chip是一种微电子制造表面贴装新工艺,应用于生产还有一些问题未能得到很好的解决。本文通过对组装工艺过程中热应力、封装工艺等关键技术问题的研究,建立了热应力、焊接过程力学模型,为Flip chip的生产进行了一些富有意义的探索。
关键词 flip-chip芯片 微电子 表面贴装 组装工艺 热应力 封装工艺
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Reliability of flip-chip bonded RFID die using anisotropic conductive paste hybrid material 被引量:1
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作者 Jun-Sik LEE Jun-Ki KIM +2 位作者 Mok-Soon KIM Namhyun KANG Jong-Hyun LEE 《Transactions of Nonferrous Metals Society of China》 SCIE EI CAS CSCD 2011年第A01期175-181,共7页
A reliability of flip-chip bonded die as a function of anisotropic conductive paste (ACP) hybrid materials, bonding conditions, and antenna pattern materials was investigated during the assembly of radio frequency ide... A reliability of flip-chip bonded die as a function of anisotropic conductive paste (ACP) hybrid materials, bonding conditions, and antenna pattern materials was investigated during the assembly of radio frequency identification(RFID) inlay. The optimization condition for flip-chip bonding was determined from the behavior of bonding strength. Under the optimized condition, the shear strength for the antenna printed with paste-type Ag ink was larger than that for Cu antenna. Furthermore, an identification distance was varied from the antenna materials. Comparing with the Ag antenna pattern, the as-bonded die on Cu antenna showed a larger distance of identification. However, the long-term reliability of inlay using the Cu antenna was decreased significantly as a function of aging time at room temperature because of the bended shape of Cu antenna formed during the flip-chip bonding process. 展开更多
关键词 RFID inlay ACP flip-chip bonding process RELIABILITY
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High power and high reliability GaN/InGaN flip-chip light-emitting diodes
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作者 张剑铭 邹德恕 +4 位作者 徐晨 朱颜旭 梁庭 达小丽 沈光地 《Chinese Physics B》 SCIE EI CAS CSCD 2007年第4期1135-1139,共5页
High-power and high-reliability GaN/InGaN flip-chip light-emitting diodes (FCLEDs) have been demonstrated by employing a flip-chip design, and its fabrication process is developed. FCLED is composed of a LED die and... High-power and high-reliability GaN/InGaN flip-chip light-emitting diodes (FCLEDs) have been demonstrated by employing a flip-chip design, and its fabrication process is developed. FCLED is composed of a LED die and a submount which is integrated with circuits to protect the LED from electrostatic discharge (ESD) damage. The LED die is flip-chip soldered to the submount, and light is extracted through the transparent sapphire substrate instead of an absorbing Ni/Au contact layer as in conventional GaN/InGaN LED epitaxial designs. The optical and electrical characteristics of the FCLED are presented. According to ESD IEC61000-4-2 standard (human body model), the FCLEDs tolerated at least 10 kV ESD shock have ten times more capacity than conventional GaN/InGaN LEDs. It is shown that the light output from the FCLEDs at forward current 350mA with a forward voltage of 3.3 V is 144.68 mW, and 236.59 mW at 1.0A of forward current. With employing an optimized contact scheme the FCLEDs can easily operate up to 1.0A without significant power degradation or failure. The li.fe test of FCLEDs is performed at forward current of 200 mA at room temperature. The degradation of the light output power is no more than 9% after 1010.75 h of life test, indicating the excellent reliability. FCLEDs can be used in practice where high power and high reliability are necessary, and allow designs with a reduced number of LEDs. 展开更多
关键词 GAN light emitting diode flip-chip high power
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Plasma清洗在Flip-Chip工艺中的重要作用 被引量:1
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作者 陈天虎 姚泽鑫 李键城 《科技风》 2017年第24期72-74,共3页
随着半导体芯片封装技术的发展,倒装芯片封装技术,其杰出的电气和热性能,高I/O引脚数,以及其封装集成较高的优势,使其在芯片封装行业中得到了快速的发展。芯片的高密度引脚封装也其对封装可靠性也提出了更高的要求,而在FlipChip工艺过... 随着半导体芯片封装技术的发展,倒装芯片封装技术,其杰出的电气和热性能,高I/O引脚数,以及其封装集成较高的优势,使其在芯片封装行业中得到了快速的发展。芯片的高密度引脚封装也其对封装可靠性也提出了更高的要求,而在FlipChip工艺过程中基板上的污染物和氧化物是导致封装中基板与芯片Bump键合失效的主要因素。为使芯片与基板能达到有效的键合,在Bond之前将基板进行plasma清洗,以提高其键合的可靠性。通过介绍plasma清洗原理、过程,以及水滴角,推力测试等实验,论证了在Flip-Chip Bond之前对基板进行plasma清洗能有效的提高产品键合的可靠性。 展开更多
关键词 PLASMA flip-chip 推力测试 水滴角 键合
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A Single Mode Hybrid Ⅲ-Ⅴ/Silicon On-Chip Laser Based on Flip-Chip Bonding Technology for Optical Interconnection
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作者 王海玲 郑婉华 《Chinese Physics Letters》 SCIE CAS CSCD 2016年第12期77-80,共4页
A single mode hybrid Ⅲ-Ⅴ/silicon on-chip laser based on the flip-chip bonding technology for on-chip optical interconnection is demonstrated. A single mode Fabry-Perot laser structure with micro-structures on an InP... A single mode hybrid Ⅲ-Ⅴ/silicon on-chip laser based on the flip-chip bonding technology for on-chip optical interconnection is demonstrated. A single mode Fabry-Perot laser structure with micro-structures on an InP ridge waveguide is designed and fabricated on an InP/AIGaInAs multiple quantum well epitaxial layer structure wafer by using i-line lithography. Then, a silicon waveguide platform including a laser mounting stage is designed and fabricated on a silicon-on-insulator substrate. The single mode laser is flip-chip bonded on the laser mounting stage. The lasing light is butt-coupling to the silicon waveguide. The laser power output from a silicon waveguide is 1.3roW, and the threshold is 37mA at room temperature and continuous wave operation. 展开更多
关键词 InP is with Chip Silicon On-Chip Laser Based on flip-chip Bonding Technology for Optical Interconnection A Single Mode Hybrid mode for
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Enhanced Luminescence of InGaN-Based 395 nm Flip-Chip Near-Ultraviolet Light-Emitting Diodes with Al as N-Electrode
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作者 徐瑾 张伟 +2 位作者 彭孟 戴江南 陈长清 《Chinese Physics Letters》 SCIE CAS CSCD 2017年第7期114-117,共4页
High-reflectivity Al-based n-electrode is used to enhance the luminescence properties of InGaN-based 395nm flip-chip near-ultraviolet (UV) light-emitting diodes. The Al-only metal layer could form the Ohmic contact ... High-reflectivity Al-based n-electrode is used to enhance the luminescence properties of InGaN-based 395nm flip-chip near-ultraviolet (UV) light-emitting diodes. The Al-only metal layer could form the Ohmic contact on the plasma etched n-GaN by means of chemical pre-treatment, with the lowest specific contact resistance of 2.211 × 10^-5 Ω. cm2. The AI n-electrodes enhance light output power of the 395 nm flip-chip near-UV light-emitting diodes by more than 33% compared with the Ti/AI n-electrodes. Meanwhile, the electrical characteristics of these chips with two types of n-electrodes do not show any significant discrepancy. The near-field light distribution measurement of packaged chips confirms that the enhanced luminescence is ascribed to the high refleetivity of the Al electrodes in the UV region. After the accelerated aging test for over 1000 h, the luminous degradation of the packaged chips with Al n-electrodes is less than 3%, which proves the reliability of these chips with the Al-based electrodes. Our approach shows a simplified design and fabrication of high-refleetivity n-electrode for flip-chip near-UV light emitting diodes. 展开更多
关键词 GaN Enhanced Luminescence of InGaN-Based 395 nm flip-chip Near-Ultraviolet Light-Emitting Diodes with Al as N-Electrode AL
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Flip-chip bonded 8-channel DFB laser array with highly uniform 400 GHz spacing and high output power for optical I/O technology
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作者 Jie Zhao Zhenxing Sun +8 位作者 Pan Dai Jin Zhang Yanqiu Xu Yue Zhang Zhuoying Wang Jiaqiang Nie Wenxuan Wang Rulei Xiao Xiangfei Chen 《Chinese Optics Letters》 2025年第4期99-105,共7页
In this paper,we proposed and experimentally demonstrated an 8-channel O-band distributed feedback(DFB)laser array with highly uniform 400 GHz spacing and high output power for optical input/output(I/O)technology.The ... In this paper,we proposed and experimentally demonstrated an 8-channel O-band distributed feedback(DFB)laser array with highly uniform 400 GHz spacing and high output power for optical input/output(I/O)technology.The grating phase is precisely controlled,and an equivalentπphase shift is implemented in the laser cavity via the reconstruction equivalent chirp(REC)technology.Anti-reflection(AR)and high-reflection(HR)films are coated on the front and rear facets,respectively,to enhance output power.The equivalentπphase shift is strategically placed near the HR film facet to improve the yield of the single longitudinal mode.Operating with a 400 GHz wavelength spacing,the proposed DFB laser array meets the continuous wave-wavelength division multiplexing multi-source agreement(CW-WDM MSA)specifications.The proposed DFB laser array is flip-chip bonded to a thin-film circuit with an aluminum nitride(AlN)submount to reduce the thermal resistance and enhance the output power.Compared to the p-side-up structure,the flip-chip bonding design significantly reduces junction temperature by 28%and increases maximum output power by approximately 20%.This design effectively lowers the thermal resistance of the chip and enhances its heat dissipation properties.At a bias current of 110 mA,the laser demonstrates wavelength deviations below 1.579 GHz and side-mode suppression ratios above 50 dB.The far-field divergence is measured at 25.8°×30.1°,and the Lorentzian linewidth is 3.28 MHz.Increasing the bias current to250 mA results in a laser output power exceeding 80 mW.Furthermore,the relative intensity noise(RIN)for all 8 channels is below-135.3 d B/Hz.The proposed flip-chip bonded 8-channel high-power DFB laser array demonstrates uniform wavelength spacing,high output power,and stable single longitudinal mode performance,making it a promising candidate for multiple wavelength laser sources in optical I/O technology. 展开更多
关键词 flip-chip high-power distributed feedback laser array reconstruction equivalent chirp technology multi-wavelength source optical input/output
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Thermal simulation and analysis of flat surface flip-chip high power light-emitting diodes 被引量:2
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作者 陈茂兴 徐晨 +1 位作者 许坤 郑雷 《Journal of Semiconductors》 EI CAS CSCD 2013年第12期49-52,共4页
Conventional GaN-based flip-chip light-emitting diodes (CFC-LEDs) use Au bumps to contact the LED chip and Si submount, however the contact area is constrained by the number of Au bumps, limiting the heat dissipatio... Conventional GaN-based flip-chip light-emitting diodes (CFC-LEDs) use Au bumps to contact the LED chip and Si submount, however the contact area is constrained by the number of Au bumps, limiting the heat dissipation performance. This paper presents a flat surface high power GaN-based flip-chip light emitting diode (SFC-LED), which can greatly improve the heat dissipation performance of the device. In order to understand the thermal performance of the SFC-LED thoroughly, a 3-D finite element model (FEM) is developed, and ANSYS is used to simulate the thermal performance. The temperature distributions of the SFC-LED and the CFC-LED are shown in this article, and the junction temperature simulation values of the SFC-LED and the CFC-LED are 112.80 ℃ and 122.97℃C, respectively. Simulation results prove that the junction temperature of the new structure is 10.17 ℃ lower than that of the conventional structure. Even if the CFC-LED has 24 Au bumps, the thermal resistance of the new structure is still far less than that of the conventional structure. The SFC-LED has a better thermal property. 展开更多
关键词 light-emitting diode flip-chip finite-element model junction temperature
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Indium bump array fabrication on small CMOS circuit for flip-chip bonding
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作者 黄寓洋 张宇翔 +5 位作者 殷志珍 崔国新 刘惠春 边历峰 杨辉 张耀辉 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2011年第11期148-151,共4页
We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/A1GaAs multiple quantum well spatial light modulator. A chip holder with a via hole is ... We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/A1GaAs multiple quantum well spatial light modulator. A chip holder with a via hole is used to coat the photoresist for indium bump lift-off. The 1000 μm-wide photoresist edge bead around the circuit chip can be reduced to less than 500 μm, which ensures the integrity of the indium bump array. 64 - 64 indium arrays with 20 μm-high, 30 μm-diameter bumps are successfully formed on a 5 - 6.5 mm^2 CMOS chip. 展开更多
关键词 flip-chip bonding indium bump ARRAY small-size
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高光密度LED光源模组研发与技术创新
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作者 贾辰宇 《计算机应用文摘》 2026年第1期208-210,共3页
为优化传统LED芯片及封装产业链,文章基于高光密度纳米增透倒装LED芯片级封装模组研发项目提出一种自主创新倒装芯片与纳米增透芯片级封装(Chip-Scale Package,CSP)封装相结合的技术方案。采用倒装结构替代传统正装结构,并引入高反射率... 为优化传统LED芯片及封装产业链,文章基于高光密度纳米增透倒装LED芯片级封装模组研发项目提出一种自主创新倒装芯片与纳米增透芯片级封装(Chip-Scale Package,CSP)封装相结合的技术方案。采用倒装结构替代传统正装结构,并引入高反射率银镜以提升芯片出光效率;以CSP封装取代COB封装,突破光源间距受限的问题;在芯片端以荧光陶瓷替代传统荧光粉,使模组在150℃高温条件下仍能保持较高的荧光转换效率。该技术方案可有效提升光源性能,推动LED产业由价格驱动向技术驱动的高质量发展转变。 展开更多
关键词 LED芯片 倒装结构 纳米压印技术 CSP封装技术
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Preparation of GaN-on-Si based thin-film flip-chip LEDs
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作者 章少华 封波 +1 位作者 孙钱 赵汉民 《Journal of Semiconductors》 EI CAS CSCD 2013年第5期35-37,共3页
GaN based MQW epitaxial layers were grown on Si (111) substrate by MOCVD using AIN as the buffer layer. High light extraction LEDs were prepared by substrate transferring technology in combination with thin-film and... GaN based MQW epitaxial layers were grown on Si (111) substrate by MOCVD using AIN as the buffer layer. High light extraction LEDs were prepared by substrate transferring technology in combination with thin-film and flip-chip design. The blue and white 1.1 × 1.1 mm2 LED lamps are measured. The optical powers and external quantum efficiency for silicone encapsulated blue lamp are 546 mW, and 50.3% at forward current of 350 mA, while the photometric light output for a white lamp packaged with standard YAG phosphor is 120.1 lm. 展开更多
关键词 silicon substrate GAN flip chip LED
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Light-extraction enhancement of freestanding GaN-based flip-chip light-emitting diodes using two-step roughening methods
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作者 安铁雷 孙波 +5 位作者 魏同波 赵丽霞 段瑞飞 廖元勋 李晋闽 伊福廷 《Journal of Semiconductors》 EI CAS CSCD 2013年第11期49-52,共4页
The light extraction enhancement of freestanding GaN-based flip-chip light-emitting diodes (FS- FCLEDs) using two-step roughening methods is investigated. The output power of LEDs fabricated by using one-step and tw... The light extraction enhancement of freestanding GaN-based flip-chip light-emitting diodes (FS- FCLEDs) using two-step roughening methods is investigated. The output power of LEDs fabricated by using one-step and two-step roughening methods are compared. The results indicate that two-step roughening meth- ods show more potential for light extraction. Compared with flat FS-FCLEDs, the output power of FS-FCLEDs with a nanotextured hemisphere surface shows an enhancement of 90.7%. 展开更多
关键词 freestanding GaN flip chip LED CSCI wet etching light extraction
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倒装焊封装3D集成式CCD的设计与验证
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作者 王小东 李明 +1 位作者 刘昌举 刘戈扬 《光电子技术》 2025年第2期148-153,共6页
3D集成式CCD是高帧频图像传感器的发展方向之一。文中采用CCD结构的高性能光敏阵列与高速处理的列级CMOS数字电路片内集成,实现图像传感器的高帧频成像。CCD光敏阵列芯片与CMOS数字电路芯片通过各自更优化的方式实现工艺加工制造,采用... 3D集成式CCD是高帧频图像传感器的发展方向之一。文中采用CCD结构的高性能光敏阵列与高速处理的列级CMOS数字电路片内集成,实现图像传感器的高帧频成像。CCD光敏阵列芯片与CMOS数字电路芯片通过各自更优化的方式实现工艺加工制造,采用倒装焊的方式将两类芯片的列级I/O接口互联,以通过I/O互联接口实现数据交互和信号处理,并最终实现3D集成式CCD片内12 bit数字输出。开展了CCD光敏阵列芯片设计、CMOS数字电路芯片设计、工艺流片、3D集成等工作,设计了1024(V)×256(H)阵列规模的3D集成式CCD,通过工艺流片、工艺优化、封装测试等研究工作,验证了3D集成式CCD的高帧频成像功能。 展开更多
关键词 电荷耦合器件 三维集成 电荷耦合器件数字输出 倒装焊 光电探测器
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红外焦平面铟柱互连可靠性评价标准研究
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作者 刘若冰 刘学孔 +2 位作者 喻松林 冯晓宇 邢艳蕾 《激光与红外》 北大核心 2025年第10期1581-1586,共6页
铟柱倒装互连是红外焦平面探测器(IRFPA)芯片间电连接的核心工艺,其可靠性直接影响探测器的性能与寿命。本文针对当前铟柱倒装互连工艺中焊点数量大、密度高、芯片尺寸大等难点,系统研究了铟柱高度均匀性、芯片面型、导通率及开关机循... 铟柱倒装互连是红外焦平面探测器(IRFPA)芯片间电连接的核心工艺,其可靠性直接影响探测器的性能与寿命。本文针对当前铟柱倒装互连工艺中焊点数量大、密度高、芯片尺寸大等难点,系统研究了铟柱高度均匀性、芯片面型、导通率及开关机循环冲击对互连可靠性的影响机制,建立了基于工艺前指标控制到工艺后可靠性验证的全流程标准化评价方法。通过典型样品的试验验证,揭示了各指标与互连失效的内在关联,为红外焦平面探测器研制提供了关键工艺控制依据。 展开更多
关键词 红外焦平面探测器 铟柱 倒装互连 可靠性
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Gb/s倒装蓝光LED在高速可见光通信中的应用研究 被引量:1
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作者 周政 龙晓燕 +2 位作者 孙小广 李加定 李健 《现代电子技术》 北大核心 2025年第9期62-66,共5页
为了研制能应用在可见光通信中的高速发光二极管(LED),设计了两种结面积为200μm×800μm和200μm×1000μm的商用蓝光GaN-LED芯片。通过在芯片中设计微孔阵列结构并将其倒装封装在陶瓷基板上。实验采用64位正交幅度调制(QAM)... 为了研制能应用在可见光通信中的高速发光二极管(LED),设计了两种结面积为200μm×800μm和200μm×1000μm的商用蓝光GaN-LED芯片。通过在芯片中设计微孔阵列结构并将其倒装封装在陶瓷基板上。实验采用64位正交幅度调制(QAM)和正交频分复用(OFDM)调制技术。实验结果表明,在驱动电流为190 mA时,两组LED输出的光功率分别为192.7mW和178.7mW,-3 dB调制带宽值最大分别为49.9 MHz和58.8 MHz,比相同偏置电流下的商用OSRAM?LED的调制带宽分别提高了5.3倍和4.3倍。当传输距离为1 m时,在低于通信误码率阈值3.8×10^(-3)时具有2Gb/s通信传输速率。LED芯片中微孔结构有效降低了载流子的复合辐射寿命,提升了LED的调制性能。倒装封装提升了LED的光萃取,改善了微米级LED光功率输出过低的缺点。 展开更多
关键词 GaN-LED 可见光通信 倒装封装 正交频分复用 传输速率 误码率
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一种Ka波段多通道RF集成微系统封装
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作者 杨振涛 余希猛 +3 位作者 于斐 刘莹玉 段强 刘林杰 《半导体技术》 北大核心 2025年第7期723-729,共7页
随着各类信息载荷集成系统性能的提升,射频(RF)集成微系统向多通道、高集成、高频率、低噪声、多功能、小型化的方向发展。基于高温共烧陶瓷(HTCC)工艺,提出了一种应用于Ka波段的多通道RF集成微系统封装,多通道RF模块通过直径0.60 mm的... 随着各类信息载荷集成系统性能的提升,射频(RF)集成微系统向多通道、高集成、高频率、低噪声、多功能、小型化的方向发展。基于高温共烧陶瓷(HTCC)工艺,提出了一种应用于Ka波段的多通道RF集成微系统封装,多通道RF模块通过直径0.60 mm的焊球与数字处理模块连接,以实现三维堆叠。结合理论计算和仿真优化,合理设计屏蔽层和接地层,以实现低损耗、高屏蔽的带状线传输结构。测试结果表明,在DC~40 GHz频段,多通道RF模块的传输路径回波损耗≤-10 dB、插入损耗≥-1.5 dB。理论计算与实测结果的均方根误差为0.0027,二者具有较好的一致性。本研究结果可为RF集成微系统陶瓷封装设计提供参考。 展开更多
关键词 高温共烧陶瓷(HTCC) 倒装芯片 射频(RF)集成微系统 三维堆叠 传输损耗
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FC-CLGA外壳用可焊性试验方法研究
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作者 彭博 郑镔 +2 位作者 林炜国 魏钰金 刘林杰 《微纳电子技术》 2025年第8期61-69,共9页
倒装芯片-陶瓷焊盘阵列(FC-CLGA)封装外壳具有体积小、引出端数量多、信号完整性好等特点,广泛应用于高速集成电路(IC)和射频微波电路中,其焊盘可靠性直接影响器件乃至整个系统的可靠性,可焊性是焊盘可靠性的一项重要指标。通过正交试验... 倒装芯片-陶瓷焊盘阵列(FC-CLGA)封装外壳具有体积小、引出端数量多、信号完整性好等特点,广泛应用于高速集成电路(IC)和射频微波电路中,其焊盘可靠性直接影响器件乃至整个系统的可靠性,可焊性是焊盘可靠性的一项重要指标。通过正交试验,研究了可焊性试验中各参数对焊盘浸润效果的影响,参数包括浸入频次、停留时间、浸入角度、浸入方向和焊料温度。试验结果表明,浸入频次、浸入角度、浸入方向对焊盘浸润效果的影响较大,停留时间(≥5s)、焊料温度(≥245℃)对焊盘浸润效果的影响较小,并确定了试验操作方法:90°正向浸入三次,若有未浸润焊盘则加涂助焊剂旋转180°再浸入三次。为后续保障FC-CLGA封装的可靠应用提供了试验参考。 展开更多
关键词 倒装芯片 陶瓷封装 焊盘 可焊性 正交试验
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基于声学显微C扫描检测技术的倒装集成电路失效分析
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作者 李登科 王高凯 《无损检测》 2025年第2期1-6,共6页
随着倒装集成电路在电子产品中的广泛应用及其失效问题的日益凸显,对其失效分析技术的要求越来越高。研究了声学显微镜C扫描模式下换能器频率、放大器增益和倒装集成电路芯片厚度间的关系,发现声学扫描图像清晰度随着换能器频率的增加... 随着倒装集成电路在电子产品中的广泛应用及其失效问题的日益凸显,对其失效分析技术的要求越来越高。研究了声学显微镜C扫描模式下换能器频率、放大器增益和倒装集成电路芯片厚度间的关系,发现声学扫描图像清晰度随着换能器频率的增加而提升;相同频率下,芯片厚度增加时,需提高放大器的增益来保证成像质量。此外还研究了声学显微C扫描检测技术在倒装集成电路失效分析中的应用场景,结果表明该技术可以无损检测出倒装集成电路内部的空洞、分层及裂纹等缺陷,完成对失效机理的准确判断。 展开更多
关键词 声学扫描显微镜 倒装芯片 失效分析 分层 芯片裂纹
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倒装器件底部填充胶评价方法探讨
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作者 刘加豪 黄梓彬 +3 位作者 柯自攀 田万春 赵昊 梁朝辉 《电子产品可靠性与环境试验》 2025年第6期10-15,共6页
在电子封装领域,采用底部填充技术对倒装器件进行结构加固已成为一种常见工艺,该技术可有效缓解芯片与基板间因热失配引起的焊点断裂等可靠性问题。然而,目前针对不同类型底部填充胶的系统性评价方法仍有待进一步研究。围绕2款底部填充... 在电子封装领域,采用底部填充技术对倒装器件进行结构加固已成为一种常见工艺,该技术可有效缓解芯片与基板间因热失配引起的焊点断裂等可靠性问题。然而,目前针对不同类型底部填充胶的系统性评价方法仍有待进一步研究。围绕2款底部填充胶的加固效果,从填充质量、耐热冲击性能及耐机械冲击性能等多个维度展开分析。结果表明,具备低粘度、高玻璃化转变温度及低热膨胀系数的底部填充胶在提升倒装芯片焊点可靠性方面表现更优,该结论为底部填充胶的选用提供了参考依据。 展开更多
关键词 底部填充胶 可靠性 倒装器件 评价方法
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基于振动的芯片封装智能缺陷检测方法研究
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作者 陈锡鑫 周秀峰 +1 位作者 宿磊 李可 《噪声与振动控制》 北大核心 2025年第6期124-131,161,共9页
针对倒装芯片振动信号缺陷特征微弱、信号成分复杂、缺陷类型多样的特点,提出一种结合完全自适应噪声集合经验模态分解(Complete Ensemble Empirical Mode Decomposition with Adaptive Noise,CEEMDAN)与神经架构搜索(Neural Architectu... 针对倒装芯片振动信号缺陷特征微弱、信号成分复杂、缺陷类型多样的特点,提出一种结合完全自适应噪声集合经验模态分解(Complete Ensemble Empirical Mode Decomposition with Adaptive Noise,CEEMDAN)与神经架构搜索(Neural Architecture Search,NAS)的焊点缺陷检测方法。在CEEMDAN基础上提出特征指标水平商以指导本征模态函数(Ntrinsic Mode Functions,IMF)的筛选,并将重构信号作为深度网络模型的输入。另外,设计一种具有可变搜索空间与灵活节点数量的弹性特征提取架构(Elastic Feature Extraction Architecture,EFEA)算法,缓解NAS中GPU内存消耗过大与节点操作数量固化问题,便于重构信号的轻量化识别。分别在仿真信号与实验数据上进行验证,证明所提水平商在CEEMDAN分量筛选上的有效性及EFEA在有限硬件资源条件下焊点缺陷检测的准确性,可在部署到算力有限的真实工业边缘设备上展示出巨大的潜力。 展开更多
关键词 故障诊断 缺陷检测 倒装芯片 完全自适应噪声集合经验模态分解 轻量化 神经架构搜索
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