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AN APPLICATION OF EVOLUTIONARY PROGRAMMING IN FIR FILTER DESIGN WITH FREQUENCY SAMPLING METHOD 被引量:2
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作者 刘文波 于盛林 《Transactions of Nanjing University of Aeronautics and Astronautics》 EI 2000年第2期218-223,共6页
Frequency sampling is one of the popular methods in FIR digital filter design. In the frequency sampling method the value of transition band samples, which are usually obtained by consulting a table, must be determi... Frequency sampling is one of the popular methods in FIR digital filter design. In the frequency sampling method the value of transition band samples, which are usually obtained by consulting a table, must be determined in order to make the attenuation within the stopband maximal. However, the value obtained by searching for table can not be ensured to be optimal. Evolutionary programming (EP), a multi agent stochastic optimization technique, can lead to global optimal solutions for complex problems. In this paper a new application of EP to frequency sampling method is introduced. Two examples of lowpass and bandpass FIR filters are presented, and the steps of EP realization and experimental results are given. Experimental results show that the value of transition band samples obtained by EP can be ensured to be optimal and the performance of the filter is improved. 展开更多
关键词 evolutionary programming fir filter frequency sampling
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Energy Efficient FIR Filter Design Using Distributed Arithmetic
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作者 GANJIKUNTA Ganesh Kumar MOHAMMED Mahaboob Basha SIBGHATULLAH Inayatullah Khan 《Journal of Shanghai Jiaotong university(Science)》 2024年第6期1023-1027,共5页
This paper presents a distributed arithmetic(DA)architecture that can efficiently implement finite impulse response(FIR)filters for biomedical signal processor applications.FIR filter design is more efficient when it ... This paper presents a distributed arithmetic(DA)architecture that can efficiently implement finite impulse response(FIR)filters for biomedical signal processor applications.FIR filter design is more efficient when it uses a look-up table(LUT)-based technique rather than a serial one.The design’s performance and efficiency can be improved by using segmented memory banks as well as memory lookup for multiply operation.Verilog HDL is used to model the proposed design,and Synopsys Design Compiler tool is used for synthesis.The FIR filter architecture utilizing DA results in a 24.82%reduction in total power compared with the serial FIR structure. 展开更多
关键词 distributed arithmetic(DA) serial finite impulse response(fir)filter biomedical signal processing dynamic voltage and frequency scaling
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Efficient Single Event Upset-Tolerant FIR Filter Design Based on Residue Number for OBP Satellite Communication Systems
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作者 高镇 Pedro Reviriego +2 位作者 赵明 王京 Juan Antonio Maestro 《China Communications》 SCIE CSCD 2013年第8期55-67,共13页
Cosmic radiation has several effects on the On-Board Processing(OBP)platform in satellite communications systems,and Single Event Upsets(SEUs)are one of its most important effects.In order to protect the Finite Impuls... Cosmic radiation has several effects on the On-Board Processing(OBP)platform in satellite communications systems,and Single Event Upsets(SEUs)are one of its most important effects.In order to protect the Finite Impulse Response(FIR)filters against SEU,this paper proposes a novel Residue Number(RN)-based method.The proposed method applies the transpose form of the FIR filter to avoid the fault missing caused by SEU on shift registers.It also adjusts the input intelligently to avoid the fault missing caused by SEU on the filter coefficients.After all the fault missing events are avoided,the modulus can be minimised to achieve the minimum overhead.Theoretical analysis and simulation results show that the noise introduced by the input adjustment is negligible.Fault injection shows that the fault missing rate of the proposed method is zero.Finally,FPGA implementation shows that the overhead of the proposed method is approximately 75% of Triple Modular Redundancy,and is only 1%-2% higher than that of the traditional RN-based design. 展开更多
关键词 satellite communication fault-tolerant design fir filter SEU residue number based OBP
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Incorporation of Reduced Full Adder and Half Adder into Wallace Multiplier and Improved Carry-Save Adder for Digital FIR Filter
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作者 S. Chinnapparaj D. Somasundareswari 《Circuits and Systems》 2016年第9期2467-2475,共9页
Improvement of digital FIR filter is vital in the field of Digital Signal Processing in order to reduce the area, delay and power. Multiplication and Accumulation (MAC) unit of Finite Impulse Response (FIR) filte... Improvement of digital FIR filter is vital in the field of Digital Signal Processing in order to reduce the area, delay and power. Multiplication and Accumulation (MAC) unit of Finite Impulse Response (FIR) filter has been designed using efficient multiplier and adder circuits for optimized APT (Area,Power and Timing) product. In this paper, the design of direct form FIR filter with efficient MAC unit has been presented. Initially, full adder and half adder structures are shrunk down by reducing number of gates. These compact full adder and half adder structures are incorporated into Wallace Multiplier and Improved Carry-Save Adder. The proposed 16-bit Carry-Save Adder has been improved by splitting into four parallel phases. Consequently the delay of enhanced Carry- Save Adder is reduced. Generation of carry output is performed using number of OR gates in a sequential manner. All these enhanced architectures are incorporated into the Digital FIR Filter to reduce the area, delay and power utilization. 展开更多
关键词 Direct Form fir filter Compact Full Adder and Half Adder Improved Carry-Save Adder Modified Wallace Multiplier FPGA
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FPGA-Based Efficient Programmable Polyphase FIR Filter 被引量:3
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作者 陈禾 熊承欢 +1 位作者 仲顺安 王华 《Journal of Beijing Institute of Technology》 EI CAS 2005年第1期4-8,共5页
The modelling, design and implementation of a high-speed programmable polyphase finite impulse response (FIR) filter with field programmable gate array (FPGA) technology are described. This FIR filter can run automati... The modelling, design and implementation of a high-speed programmable polyphase finite impulse response (FIR) filter with field programmable gate array (FPGA) technology are described. This FIR filter can run automatically according to the programmable configuration word including symmetry/asymmetry, odd/even taps, from 32 taps up to 256 taps. The filter with 12 bit signal and 12 bit coefficient word-length has been realized on a Xilinx VirtexⅡ-v1500 device and operates at the maximum sampling frequency of (160 MHz.) 展开更多
关键词 finite impulse response (fir) filter POLYPHASE field programmable gate array (FPGA)
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Indoor INS/UWB-based Human Localization With Missing Data Utilizing Predictive UFIR Filtering 被引量:3
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作者 Yuan Xu Choon Ki Ahn +2 位作者 Yuriy S. Shmaliy Xiyuan Chen Lili Bu 《IEEE/CAA Journal of Automatica Sinica》 SCIE EI CSCD 2019年第4期952-960,共9页
A combined algorithm for the loosely fused ultra wide band(UWB)and inertial navigation system(INS)-based measurements is designed under the indoor human navigation conditions with missing data.The scheme proposed fuse... A combined algorithm for the loosely fused ultra wide band(UWB)and inertial navigation system(INS)-based measurements is designed under the indoor human navigation conditions with missing data.The scheme proposed fuses the INS-and UWB-derived positions via a data fusion filter.Since the UWB signal is prone to drift in indoor environments and its outage highly affects the integrated scheme reliability,we also consider the missing data problem in UWB measurements.To overcome this problem,the loosely-coupled INS/UWB-integrated scheme is augmented with a prediction option based on the predictive unbiased finite impulse response(UFIR)fusion filter.We show experimentally that,the standard UFIR fusion filter has higher robustness than the Kalman filter.It is also shown that the predictive UFIR fusion filter is able to produce an acceptable navigation accuracy under temporary missing UWB-data. 展开更多
关键词 INDOOR human navigation INS/UWB model prediction UNBIASED fir filter
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Fault Detection Based on FIR Filters with Variable Discount Factors for Industrial Robot Drive Systems 被引量:1
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作者 WANG Tao ZHANG Le +1 位作者 FANG Guanghui BAI Yawen 《Wuhan University Journal of Natural Sciences》 CAS CSCD 2021年第2期165-173,共9页
To enhance dynamic tracking performance and anti-disturbance capacity of finite impulse response(FIR) filters, variable discount factors are introduced to the recursive least squares(RLS) algorithm. By employing impro... To enhance dynamic tracking performance and anti-disturbance capacity of finite impulse response(FIR) filters, variable discount factors are introduced to the recursive least squares(RLS) algorithm. By employing improved FIR filters to conduct modelling of industrial robot drive systems, dynamic characteristics of the target systems are identified. Then the fault detection for a target system can be utilized by analyzing the coefficients of the FIR filter. Finally, an application of the fault detection scheme to a kind of brushless DC motor drive system is described. Compared with reference methods, the proposed scheme achieves effective fault detection and performs better in dynamic tracking and robustness according to the final simulation results. 展开更多
关键词 fault detection variable discount factor industrial robot fir(finite impulse response)filter
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Digital FIR filter design for bio-signal processing system
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作者 Woojin Nam Guang Yang Seongsoo Lee 《Journal of Measurement Science and Instrumentation》 CAS 2013年第1期94-96,共3页
Recently,real-time processing systems for bio-signal of the muscles generated by the movement of the user have been developed.Finite impulse response(FIR)filter for bio-signal processing in bio-signal process systems ... Recently,real-time processing systems for bio-signal of the muscles generated by the movement of the user have been developed.Finite impulse response(FIR)filter for bio-signal processing in bio-signal process systems is composed of multiple multiplier and adder of high-area.This makes the chip area increase significantly.To solve this problem,a low-area digital FIR filter is proposed in this paper,which can reduce the chip area. 展开更多
关键词 low area digital finite impulse response(fir)filter bio-signal processing
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DAPSO and PSO-VAF in Linear Phase Digital Low Pass FIR Filter Design
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作者 Mudit Shukla G. R. Mishra 《Circuits and Systems》 2014年第3期57-67,共11页
Digital filters play a key role in the field of digital signal processing. This paper presents a linear phase digital low pass finite impulse response (FIR) filter design using particle swarm optimization and its two ... Digital filters play a key role in the field of digital signal processing. This paper presents a linear phase digital low pass finite impulse response (FIR) filter design using particle swarm optimization and its two new variants, dynamic and adjustable particle swarm optimization (DAPSO) and particle swarm optimization with variable acceleration factor (PSO-VAF) and illustrates the superiority of the PSO-VAF method over PSO based methods. Two fitness functions are considered. The fitness1 is used to find the possible minimum ripples in pass band and stop band in case of PSO, DAPSO and PSO-VAF. Fitness2 is able to control the ripples in both bands separately. A comparison of simulation results demonstrates the performance of PSO and its methods in designing digital low pass FIR filters. 展开更多
关键词 DIGITAL filterS Design LOW PASS fir filterS PSO DAPSO PSO-VAF
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High-Performance FIR Filter Implementation Using Anurupye Vedic Multiplier
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作者 S. Jayakumar Dr. A. Sumathi 《Circuits and Systems》 2016年第11期3723-3733,共12页
In this, today’s world immeasurable analysis goes within the field of communication and signal processing applications. The FIR filter is mostly employed in filtering applications to enhance the quality of the signal... In this, today’s world immeasurable analysis goes within the field of communication and signal processing applications. The FIR filter is mostly employed in filtering applications to enhance the quality of the signal. In any processor, the performance of the system is based on the speed of the multiplier unit involved in its operation. Since multiplier forms the indispensable building blocks of the FIR filter system. Its performance has contributed in determining the execution of the FIR filter system. Also, due to the tremendous development in the technology, many approaches such as an array, Vedic methods are made to speed up the multiplier computations. The problem in speed-up operation and resource utilization of hardware with all the conventional methods due to the critical path found in partial products has to be optimized using proposed method. This paper presents the implementation and execution of a FIR Filter design using Anurupye multiplier. Here the FIR filter is examined by using various multiplier algorithms such as Anurupye, Urdhava Tiryagbhyam, and array multipliers. The FIR filter is simulated for analyzing delay;area and power are meted out and lessened by utilizing proposed Anurupye multiplier. The FIR filter design utilizing proposed multiplier offers delay around 18.99 and only 4% of LUT slice utilization compared to existing methods. This architecture is coded in VHDL, simulated using the ModelSim and synthesized with Xilinx. 展开更多
关键词 Finite Impulse Response (fir) filter Urdhava Triyagbhyam Anurupye Vedic Multiplier Very High-Speed Hardware Description Language (VHDL)
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A Neural Network Approach for Designing 2-D FIR Filters with Arbitrary Magnitude Responses
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作者 Xiaohua Wang Yigang He 《通讯和计算机(中英文版)》 2006年第3期66-71,共6页
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FIR数字带通滤波器实验设计
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作者 姜恩华 窦德召 +1 位作者 许学杰 周正 《商丘师范学院学报》 2025年第9期26-29,共4页
借助Matlab软件提供的FIR滤波器设计函数或FDATool软件,实现FIR带通滤波器设计,求得单位脉冲响应h(n).把h(n)代入Matlab函数tf2sos,求得FIR级联型网络结构的系数矩阵SOS和增益G.通过计算h(n)和输入序列x(n)的线性卷积,求得FIR滤波器的输... 借助Matlab软件提供的FIR滤波器设计函数或FDATool软件,实现FIR带通滤波器设计,求得单位脉冲响应h(n).把h(n)代入Matlab函数tf2sos,求得FIR级联型网络结构的系数矩阵SOS和增益G.通过计算h(n)和输入序列x(n)的线性卷积,求得FIR滤波器的输出y(n),提出了实现FIR数字滤波的线性卷积计算方法.根据FIR带通滤波器的边界截止频率,设计了输入序列x(n).借助CCS 5.5软件,采用C语言编程,设计了FIR直接型网络结构和FIR级联型网络结构的滤波程序,实现对输入序列x(n)滤波.实验结果表明,采用Matlab和CCS 5.5软件,能够很好地完成FIR数字带通滤波器实验设计. 展开更多
关键词 MATLAB软件 FDATool软件 CCS 5.5软件 fir带通滤波器
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基于改进的迭代重加权OMP的稀疏FIR滤波器设计 被引量:1
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作者 李怡 赵加祥 《电子信息对抗技术》 2025年第1期73-78,共6页
有限脉冲响应(Finite Impulse Response, FIR)滤波器具备线性相位和稳定性的优点,在雷达信号处理、图像处理、电子对抗等领域被广泛应用。然而高性能的FIR滤波器通常需要较高的阶数,导致硬件实现成本高、系统功耗大。针对该问题,提出了... 有限脉冲响应(Finite Impulse Response, FIR)滤波器具备线性相位和稳定性的优点,在雷达信号处理、图像处理、电子对抗等领域被广泛应用。然而高性能的FIR滤波器通常需要较高的阶数,导致硬件实现成本高、系统功耗大。针对该问题,提出了一种改进的迭代重加权正交匹配追踪算法,设计稀疏的线性相位FIR滤波器。该算法采用Frobenius范数简化在每次迭代中求解目标稀疏FIR滤波器的过程,并且引入一个对数函数迭代更新权重。仿真结果表明,在某些情况下所提算法设计的滤波器比已有的稀疏滤波器设计方法具有更短的有效滤波器长度和更少的滤波器非零抽头个数,避免了硬件实现时乘法器和加法器的大量使用,从而有效地降低了实现成本和系统功耗。 展开更多
关键词 稀疏fir滤波器 线性相位 正交匹配追踪 FROBENIUS范数
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基于神经网络的稀疏二维FIR滤波器设计
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作者 李怡 赵加祥 徐微 《计算机工程与设计》 北大核心 2025年第7期1841-1847,共7页
针对高性能二维线性相位有限脉冲响应(finite impulse response,FIR)滤波器设计,随着阶数增加导致计算和存储压力过大的问题,提出一种稀疏二维FIR滤波器设计的迭代方法。稀疏二维FIR滤波器设计问题被转化为神经网络的李雅普诺夫能量函... 针对高性能二维线性相位有限脉冲响应(finite impulse response,FIR)滤波器设计,随着阶数增加导致计算和存储压力过大的问题,提出一种稀疏二维FIR滤波器设计的迭代方法。稀疏二维FIR滤波器设计问题被转化为神经网络的李雅普诺夫能量函数最小化问题。在每次迭代中,利用加权Frobenius范数的正交匹配追踪(orthogonal matching pursuit,OMP)算法寻找滤波器中非零系数的位置,使用Hopfield神经网络计算非零系数。仿真结果表明,该方法能够有效增加二维FIR滤波器的稀疏度,稀疏效果优于已有的稀疏滤波器设计算法。 展开更多
关键词 霍普菲尔德神经网络 稀疏滤波器 线性相位 二维有限脉冲响应滤波器 弗罗贝尼乌斯范数 正交匹配追踪 迭代算法
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基于最优FIR滤波器的小电流接地故障选线技术 被引量:2
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作者 王喆 《粘接》 2025年第3期150-153,共4页
由于小电流接地系统的故障信号特征不明显,容易被其他干扰信号掩盖,导致故障选线不准确。为提升小电流接地故障定位准确度,提出基于最优FIR滤波器的小电流接地故障选线技术。通过分析小电流接地故障的暂态特征,获取电流接地故障原因。采... 由于小电流接地系统的故障信号特征不明显,容易被其他干扰信号掩盖,导致故障选线不准确。为提升小电流接地故障定位准确度,提出基于最优FIR滤波器的小电流接地故障选线技术。通过分析小电流接地故障的暂态特征,获取电流接地故障原因。采用EMD分解方法对小电流接地系统各相电路实施零序电流分解,以高频分量为目标设计最优FIR滤波器。根据建立的最优FIR滤波器,计算线路频带信号相应幅值,确定暂态零序电流时频特征。依据时频特征的相似性度量结果,制定综合相关系数,确立判定条件实现小电流接地故障选线。实验结果表明,所提方法开展小电流接地故障选线时,选线判据灵敏度高且抗噪性较好。由此证明,所提方法在小电流接地故障选线时具有较高的应用效果。 展开更多
关键词 最优fir滤波器 小电流接地故障 选线技术 特征提取 电流时频分解
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一种基于帧结构的并行FIR数字滤波的FPGA实现 被引量:1
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作者 胡春江 刘宪军 +2 位作者 张丁丁 李炎桦 黎伟 《自动化应用》 2025年第6期236-239,共4页
针对FPGA内直接型FIR滤波架构数据吞吐速率慢、数据带宽受限,传统并行FIR滤波架构实现逻辑复杂、硬件资源消耗大的问题,提出了一种基于帧结构的并行FIR数字滤波架构。通过从流水输入的数据中提取滑动帧进行滑动滤波,并根据帧结构对滑动... 针对FPGA内直接型FIR滤波架构数据吞吐速率慢、数据带宽受限,传统并行FIR滤波架构实现逻辑复杂、硬件资源消耗大的问题,提出了一种基于帧结构的并行FIR数字滤波架构。通过从流水输入的数据中提取滑动帧进行滑动滤波,并根据帧结构对滑动滤波输出进行拼接、截取,所提滤波架构可以获得与传统并行FIR滤波架构几乎相同的频域响应。而相较于传统并行架构,所提架构消耗的系统资源更少,工程上更易实现。基于MATLAB和ISE的仿真实验结果证明了所提滤波架构的有效性。 展开更多
关键词 fir数字滤波 FPGA 并行架构
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基于MATLAB的FIR数字滤波器设计分析 被引量:1
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作者 贺雪莉 《铁路计算机应用》 2025年第3期75-81,共7页
文章主要研究基于MATLAB实现有限长单位脉冲响应(FIR,Finite Impulse Response)数字滤波器的设计方法,分别从时域和频域两方面对窗函数法和频域采样法进行详细描述,并通过类比两种设计方法的仿真结果,总结其优缺点,可为实际滤波器设计... 文章主要研究基于MATLAB实现有限长单位脉冲响应(FIR,Finite Impulse Response)数字滤波器的设计方法,分别从时域和频域两方面对窗函数法和频域采样法进行详细描述,并通过类比两种设计方法的仿真结果,总结其优缺点,可为实际滤波器设计方法的选择提供理论支撑。 展开更多
关键词 有限长单位脉冲响应(fir) 数字滤波器 MATLAB 窗函数法 频域采样法
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基于Verilog的FIR滤波器的设计与实现
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作者 苏靖轩 《信息与电脑》 2025年第4期80-83,共4页
文章介绍了利用Quartus和ModelSim联合实现并仿真一个32阶线性相位有限冲激响应(Finite Impulse Response,FIR)低通滤波器的过程,采样率为30 MHz,截止频率为2 MHz。输入信号为1 MHz、4 MHz、7 MHz的正弦波叠加。滤波器系数由MATLAB设计... 文章介绍了利用Quartus和ModelSim联合实现并仿真一个32阶线性相位有限冲激响应(Finite Impulse Response,FIR)低通滤波器的过程,采样率为30 MHz,截止频率为2 MHz。输入信号为1 MHz、4 MHz、7 MHz的正弦波叠加。滤波器系数由MATLAB设计,硬件描述和综合在Quartus完成,仿真验证通过ModelSim进行。结果表明,该滤波器能有效抑制高于2 MHz的频率成分,保持通带信号完整性。研究提升了数字滤波器设计的性能与精度,对通信与信号处理领域具有重要意义。 展开更多
关键词 fir滤波器 线性相位 Quartus MODELSIM VERILOG
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基于FPGA的DDS任意波形发生器及FIR数字滤波系统设计
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作者 周琦发 李正权 《自动化应用》 2025年第17期137-141,共5页
为满足测试领域对多样化信号激励源的需求,基于FPGA研制了集成FIR数字滤波功能的DDS任意波形发生器系统。系统以DAC11001B芯片构建数模转换电路,采用VC709 FPGA开发板实现数字波形生成与切换控制,结合MATLAB生成FIR滤波器系数文件构建... 为满足测试领域对多样化信号激励源的需求,基于FPGA研制了集成FIR数字滤波功能的DDS任意波形发生器系统。系统以DAC11001B芯片构建数模转换电路,采用VC709 FPGA开发板实现数字波形生成与切换控制,结合MATLAB生成FIR滤波器系数文件构建数字滤波模块。结果表明,该系统可输出4种用户可切换、频率相对误差不超过1%的模拟波形,并支持FIR数字信号滤波处理功能,有效扩展了系统的灵活性,为信号测试提供了高效灵活的解决方案。 展开更多
关键词 直接数字频率合成 任意波形发生器 现场可编程门阵列 fir数字滤波系统
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A digital energy spectroscopy based on FIR filter 被引量:5
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作者 XIE ShuXin LIANG Hao +1 位作者 SUN Jian YU XiaoQi 《Science China(Technological Sciences)》 SCIE EI CAS 2011年第1期251-254,共4页
We designed a universal digital energy spectroscopy based on online digital signal processing. A prototype system was built and tested. Signals from radiation detectors were processed via a digital filter whose coeffi... We designed a universal digital energy spectroscopy based on online digital signal processing. A prototype system was built and tested. Signals from radiation detectors were processed via a digital filter whose coefficients could be modified without changing the hardware. The paper introduces the hardware design of the digital energy spectroscopy system as well as the full set of software consisting of the selection of the coefficients of the finite impulse response (FIR) filter and the coding in the field-programmable gate array (FPGA). The system was tested with the high purity germanium (HPGe) detector. The results showed that this prototype can achieve an energy resolution close to that of a traditional multi-channel analyzer (MCA) with a much higher counting rate. 展开更多
关键词 digital energy spectroscopy FPGA fir filter online digital processing spectrum measurement
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