Using thermal models to describe the heat dissipation process of FCBGA is a significant topic in the field of packaging.However,the thermal resistance model considering the structure of each part of the chip is still ...Using thermal models to describe the heat dissipation process of FCBGA is a significant topic in the field of packaging.However,the thermal resistance model considering the structure of each part of the chip is still ambiguous and rare,but it is quite desirable in engineering.In this work,we propose a detailed thermal resistance network model,and describe it by using thermal conduction resistance and thermal spreading resistance.For a striking FCBGA case,we calculated the thermal resistance of each part of the structure according to the temperature field simulated by COMSOL.The thermal resistance network can be used to predict the temperatures in the chip under different conditions.For example,when the power changes by 40%,the relative error of junction temperature prediction is only 0.24%.The function of the detailed thermal resistance network in evaluating the optimization space and determining the optimization direction is clarified.This work illustrates a potential thermal resistance analysis method for electronic devices such as FCBGA.展开更多
This paper studies the typical failure modes and failure mechanisms of non-wetting in an FCBGA（flip chip ball grid array） assembly.We have identified that the residual lead and tin oxide layer on the surface of the ...This paper studies the typical failure modes and failure mechanisms of non-wetting in an FCBGA（flip chip ball grid array） assembly.We have identified that the residual lead and tin oxide layer on the surface of the die bumps as the primary contributor to non-wetting between die bumps and substrate bumps during the chipattach reflow process.Experiments with bump reflow parameters revealed that an optimized reflow dwell time and H_2 flow rate in the reflow oven can significantly reduce the amount of lead and tin oxides on the surface of the die bumps,thereby reducing the non-wetting failure rate by about 90%.Both failure analysis results and mass production data validate the non-wetting failure mechanisms identified by this study.As a result of the reflow process optimization,the failure rate associated with non-wetting is significantly reduced,which further saves manufacturing cost and increases capacity utilization.展开更多
基金supported by the National Natural Science Foundation of China (NSFC) (Grants.52176078, and 51827807)the Research Foundation of Zhongxing Telecom Equipment Corporation (Analysis and optimization of internal thermal resistance of FCBGA chip)the Tsinghua University Initiative Scientific Research Program。
文摘Using thermal models to describe the heat dissipation process of FCBGA is a significant topic in the field of packaging.However,the thermal resistance model considering the structure of each part of the chip is still ambiguous and rare,but it is quite desirable in engineering.In this work,we propose a detailed thermal resistance network model,and describe it by using thermal conduction resistance and thermal spreading resistance.For a striking FCBGA case,we calculated the thermal resistance of each part of the structure according to the temperature field simulated by COMSOL.The thermal resistance network can be used to predict the temperatures in the chip under different conditions.For example,when the power changes by 40%,the relative error of junction temperature prediction is only 0.24%.The function of the detailed thermal resistance network in evaluating the optimization space and determining the optimization direction is clarified.This work illustrates a potential thermal resistance analysis method for electronic devices such as FCBGA.
基金Project supported by the National Natural Science Foundation of China(Nos.70871091,61075064,61034004,61005090)the PhD Program Foundation of Ministry of Education of China(No.20100072110038)the Program for New Century Excellent Talents in University of Ministry of Education of China
文摘This paper studies the typical failure modes and failure mechanisms of non-wetting in an FCBGA（flip chip ball grid array） assembly.We have identified that the residual lead and tin oxide layer on the surface of the die bumps as the primary contributor to non-wetting between die bumps and substrate bumps during the chipattach reflow process.Experiments with bump reflow parameters revealed that an optimized reflow dwell time and H_2 flow rate in the reflow oven can significantly reduce the amount of lead and tin oxides on the surface of the die bumps,thereby reducing the non-wetting failure rate by about 90%.Both failure analysis results and mass production data validate the non-wetting failure mechanisms identified by this study.As a result of the reflow process optimization,the failure rate associated with non-wetting is significantly reduced,which further saves manufacturing cost and increases capacity utilization.
