无线通信系统中,功率放大器既是发射端尺寸最大的器件,也是功耗最高的器件。为应对通信系统对功放提出的小体积、高效率的要求,介绍了一款基于GaN工艺的内匹配Doherty功率放大器。该放大器工作频率为3.4~3.6 GHz,饱和输出功率大于47 d ...无线通信系统中,功率放大器既是发射端尺寸最大的器件,也是功耗最高的器件。为应对通信系统对功放提出的小体积、高效率的要求,介绍了一款基于GaN工艺的内匹配Doherty功率放大器。该放大器工作频率为3.4~3.6 GHz,饱和输出功率大于47 d Bm,附加效率大于55%,输出功率回退4.5 d B时,附加效率大于52%。功率放大器采用内匹配技术设计,可以有效减小体积,整个放大器外封装尺寸为30.8 mm×27.4 mm。展开更多
A two-way K/Ka-band series-Doherty PA(SDPA)with a distributed impedance inverting network(IIN)for millimeter wave applications is presented in this article.The proposed distributed IIN contributes to achieve wideband ...A two-way K/Ka-band series-Doherty PA(SDPA)with a distributed impedance inverting network(IIN)for millimeter wave applications is presented in this article.The proposed distributed IIN contributes to achieve wideband linear and power back-off(PBO)efficiency enhancement.Implemented in 65 nm bulk CMOS technology,this work realizes a measured 3 dB band-width of 15.5 GHz with 21.2 dB peak small-signal gain at 34.2 GHz.Under 1-V power supply,it achieves OP1dB over 13.4 dBm and Psat over 16 dBm between 21 to 30 GHz.The measured maximum Psat,OP1dB,peak/OP1dB/6dBPBO PAE results are 17.5,14.7 dBm,and 28.2%/23.2%/13.2%.Without digital pre-distortion(DPD)and equalization,EVMs are lower than-25.2 dB for 200 MHz 64-QAM signals.Besides,this work achieves-33.35,-23.52,and-20 dB EVMs for 100 MHz 256-QAM,600 MHz 64-QAM and 2 GHz 16-QAM signals at 27 GHz without DPD and equalization.展开更多
In this paper,a hybrid integrated broadband Doherty power amplifier(DPA)based on a multi-chip module(MCM),whose active devices are fabricated using the gallium nitride(GaN)process and whose passive circuits are fabric...In this paper,a hybrid integrated broadband Doherty power amplifier(DPA)based on a multi-chip module(MCM),whose active devices are fabricated using the gallium nitride(GaN)process and whose passive circuits are fabricated using the gallium arsenide(GaAs)integrated passive device(IPD)process,is proposed for 5G massive multiple-input multiple-output(MIMO)application.An inverted DPA structure with a low-Q output network is proposed to achieve better bandwidth performance,and a single-driver architecture is adopted for a chip with high gain and small area.The proposed DPA has a bandwidth of 4.4-5.0 GHz that can achieve a saturation of more than 45.0 dBm.The gain compression from 37 dBm to saturation power is less than 4 dB,and the average power-added efficiency(PAE)is 36.3%with an 8.5 dB peak-to-average power ratio(PAPR)in 4.5-5.0 GHz.The measured adjacent channel power ratio(ACPR)is better than50 dBc after digital predistortion(DPD),exhibiting satisfactory linearity.展开更多
In this paper,a simple adaptive power dividing function for the design of a dual-input Doherty power amplifier(DPA)is presented.In the presented approaches,the signal separation function(SSF)at different frequency poi...In this paper,a simple adaptive power dividing function for the design of a dual-input Doherty power amplifier(DPA)is presented.In the presented approaches,the signal separation function(SSF)at different frequency points can be characterized by a polynomial.And in the practical test,the coefficients of SSF can be determined by measuring a small number of data points of input power.Same as other dualinput DPAs,the proposed approach can also achieve high output power and back-off efficiency in a broadband operation band by adjusting the power distribution ratio flexibly.Finally,a 1.5-2.5 GHz highefficiency dual-input Doherty power amplifier is implemented according to this approach.The test results show that the peak power is 48.6-49.7d Bm,and the 6-d B back-off efficiency is 51.0-67.0%,and the saturation efficiency is 52.4-74.6%.The digital predistortion correction is carried out at the frequency points of 1.8/2.1GHz,and the adjacent channel power ratio is lower than-54.5d Bc.Simulation and experiment results can verify the effectiveness and correctness of the proposed method.展开更多
逆F类功放在接近饱和区工作时效率很高,将其与Doherty功放结构相结合,可以实现一种在大功率回退的情况下仍然具有很高效率的射频功率放大器。本文设计了一款基于Ga N HEMT晶体管的高效率的逆F类Doherty功率放大器,工作频带为910MHz^950...逆F类功放在接近饱和区工作时效率很高,将其与Doherty功放结构相结合,可以实现一种在大功率回退的情况下仍然具有很高效率的射频功率放大器。本文设计了一款基于Ga N HEMT晶体管的高效率的逆F类Doherty功率放大器,工作频带为910MHz^950MHz。单音信号测试结果显示,在930MHz处,功放回退7.5d B后漏极效率仍高达64.2%。使用3载波WCDMA信号作为测试信号,利用数字预失真技术进行线性化后,功放输出信号的上下边带邻信道功率比(ACPR)分别为-35.39d Bc和-35.9d Bc。展开更多
文摘无线通信系统中,功率放大器既是发射端尺寸最大的器件,也是功耗最高的器件。为应对通信系统对功放提出的小体积、高效率的要求,介绍了一款基于GaN工艺的内匹配Doherty功率放大器。该放大器工作频率为3.4~3.6 GHz,饱和输出功率大于47 d Bm,附加效率大于55%,输出功率回退4.5 d B时,附加效率大于52%。功率放大器采用内匹配技术设计,可以有效减小体积,整个放大器外封装尺寸为30.8 mm×27.4 mm。
基金supported in part by the National Key Research and Development Program of China under Grant 2020YFB1807300the Beijing Advanced Innovation Center for Integrated Circuits。
文摘A two-way K/Ka-band series-Doherty PA(SDPA)with a distributed impedance inverting network(IIN)for millimeter wave applications is presented in this article.The proposed distributed IIN contributes to achieve wideband linear and power back-off(PBO)efficiency enhancement.Implemented in 65 nm bulk CMOS technology,this work realizes a measured 3 dB band-width of 15.5 GHz with 21.2 dB peak small-signal gain at 34.2 GHz.Under 1-V power supply,it achieves OP1dB over 13.4 dBm and Psat over 16 dBm between 21 to 30 GHz.The measured maximum Psat,OP1dB,peak/OP1dB/6dBPBO PAE results are 17.5,14.7 dBm,and 28.2%/23.2%/13.2%.Without digital pre-distortion(DPD)and equalization,EVMs are lower than-25.2 dB for 200 MHz 64-QAM signals.Besides,this work achieves-33.35,-23.52,and-20 dB EVMs for 100 MHz 256-QAM,600 MHz 64-QAM and 2 GHz 16-QAM signals at 27 GHz without DPD and equalization.
基金supported in part by the National Key Research and Development Program of China(2021YFA0716601)the National Science Fund(62225111).
文摘In this paper,a hybrid integrated broadband Doherty power amplifier(DPA)based on a multi-chip module(MCM),whose active devices are fabricated using the gallium nitride(GaN)process and whose passive circuits are fabricated using the gallium arsenide(GaAs)integrated passive device(IPD)process,is proposed for 5G massive multiple-input multiple-output(MIMO)application.An inverted DPA structure with a low-Q output network is proposed to achieve better bandwidth performance,and a single-driver architecture is adopted for a chip with high gain and small area.The proposed DPA has a bandwidth of 4.4-5.0 GHz that can achieve a saturation of more than 45.0 dBm.The gain compression from 37 dBm to saturation power is less than 4 dB,and the average power-added efficiency(PAE)is 36.3%with an 8.5 dB peak-to-average power ratio(PAPR)in 4.5-5.0 GHz.The measured adjacent channel power ratio(ACPR)is better than50 dBc after digital predistortion(DPD),exhibiting satisfactory linearity.
基金supported by National Natural Science Foundation of China(No.62001061)。
文摘In this paper,a simple adaptive power dividing function for the design of a dual-input Doherty power amplifier(DPA)is presented.In the presented approaches,the signal separation function(SSF)at different frequency points can be characterized by a polynomial.And in the practical test,the coefficients of SSF can be determined by measuring a small number of data points of input power.Same as other dualinput DPAs,the proposed approach can also achieve high output power and back-off efficiency in a broadband operation band by adjusting the power distribution ratio flexibly.Finally,a 1.5-2.5 GHz highefficiency dual-input Doherty power amplifier is implemented according to this approach.The test results show that the peak power is 48.6-49.7d Bm,and the 6-d B back-off efficiency is 51.0-67.0%,and the saturation efficiency is 52.4-74.6%.The digital predistortion correction is carried out at the frequency points of 1.8/2.1GHz,and the adjacent channel power ratio is lower than-54.5d Bc.Simulation and experiment results can verify the effectiveness and correctness of the proposed method.
