Device physics research for submicron and deep submicron space microelectronics devices and integrated circuits will be described in three topics.1.Thin film submicron and deep submicron SOS / CMOS devices and integra...Device physics research for submicron and deep submicron space microelectronics devices and integrated circuits will be described in three topics.1.Thin film submicron and deep submicron SOS / CMOS devices and integrated circuits.2.Deep submicron LDD CMOS devices and integrated circuits.3.C band and Ku band microwave GaAs MESFET and III-V compound hetrojunction HEM T and HBT devices and integrated circuits.展开更多
Hot carrier injection （HCI） at high temperatures and different values of gate bias Vg has been performed in order to study the actions of negative bias temperature instability （NBTI） and hot carriers. Hot-carrier-...Hot carrier injection （HCI） at high temperatures and different values of gate bias Vg has been performed in order to study the actions of negative bias temperature instability （NBTI） and hot carriers. Hot-carrier-stress-induced damage at Vg = Vd, where Vd is the voltage of the transistor drain, increases as temperature rises, contrary to conventional hot carrier behaviour, which is identified as being related to the NBTI. A comparison between the actions of NBTI and hot carriers at low and high gate voltages shows that the damage behaviours are quite different： the low gate voltage stress results in an increase in transconductance, while the NBTI-dominated high gate voltage and high temperature stress causes a decrease in transconductance. It is concluded that this can be a major source of hot carrier damage at elevated temperatures and high gate voltage stressing of p-channel metal-oxide-semiconductor field-effect transistors （PMOSFETs）. We demonstrate a novel mode of NBTI-enhanced hot carrier degradation in PMOSFETs. A novel method to decouple the actions of NBTI from that of hot carriers is also presented.展开更多
The main electrical properties of advanced Silicon On Insulator MOSFETs are addressed. The subthreshold and high field operations are analysed as a function of device architecture. The special SOI parasitic phenomena,...The main electrical properties of advanced Silicon On Insulator MOSFETs are addressed. The subthreshold and high field operations are analysed as a function of device architecture. The special SOI parasitic phenomena, such as the floating body potential and temperature, are critically reviewed. The main limitations of submicron MOSFET are comparatively evaluated for various SOI structures. Short channel and hot carrier effects as well as the reliability of the SOI technology are investigated for gate length down to sub\|0 1 micron.展开更多
We investigate how F exposure impacts the hot-carrier degradation in deep submicron NMOSFET with different technologies and device geometries for the first time. The results show that hot-carrier degradations on irrad...We investigate how F exposure impacts the hot-carrier degradation in deep submicron NMOSFET with different technologies and device geometries for the first time. The results show that hot-carrier degradations on irradiated devices are greater than those without irradiation, especially for narrow channel device. The reason is attributed to charge traps in STI, which then induce different electric field and impact ionization rates during hotcarrier stress.展开更多
A compact model for LDD MOSFET is proposed,which involves the hyperbolic tangent function description and the physics of device with emphasis on the substrate current modeling.The simulation results demonstrate good ...A compact model for LDD MOSFET is proposed,which involves the hyperbolic tangent function description and the physics of device with emphasis on the substrate current modeling.The simulation results demonstrate good agreement with measurement,and show that deep submicron LDD MOSFET has larger substrate current than submicron device does.The improved model costs low computation consumption,and is effective in manifestation of hot carrier effect and other effects in deep submicron devices,in turn is suitable for design and reliability analysis of scaling down devices.展开更多
文摘Device physics research for submicron and deep submicron space microelectronics devices and integrated circuits will be described in three topics.1.Thin film submicron and deep submicron SOS / CMOS devices and integrated circuits.2.Deep submicron LDD CMOS devices and integrated circuits.3.C band and Ku band microwave GaAs MESFET and III-V compound hetrojunction HEM T and HBT devices and integrated circuits.
基金Project supported by the National Natural Science Foundation of China （Grant No 60206006）. the Program for New Century Excellent Talents of Ministry of Education of China （Grant No 681231366）. the National Defense Pre-Research Foundation of China （Grant No 51408010305DZ0168） and the Key Project of Chinese Ministry of Education （Grant No 104172）.
文摘Hot carrier injection （HCI） at high temperatures and different values of gate bias Vg has been performed in order to study the actions of negative bias temperature instability （NBTI） and hot carriers. Hot-carrier-stress-induced damage at Vg = Vd, where Vd is the voltage of the transistor drain, increases as temperature rises, contrary to conventional hot carrier behaviour, which is identified as being related to the NBTI. A comparison between the actions of NBTI and hot carriers at low and high gate voltages shows that the damage behaviours are quite different： the low gate voltage stress results in an increase in transconductance, while the NBTI-dominated high gate voltage and high temperature stress causes a decrease in transconductance. It is concluded that this can be a major source of hot carrier damage at elevated temperatures and high gate voltage stressing of p-channel metal-oxide-semiconductor field-effect transistors （PMOSFETs）. We demonstrate a novel mode of NBTI-enhanced hot carrier degradation in PMOSFETs. A novel method to decouple the actions of NBTI from that of hot carriers is also presented.
文摘The main electrical properties of advanced Silicon On Insulator MOSFETs are addressed. The subthreshold and high field operations are analysed as a function of device architecture. The special SOI parasitic phenomena, such as the floating body potential and temperature, are critically reviewed. The main limitations of submicron MOSFET are comparatively evaluated for various SOI structures. Short channel and hot carrier effects as well as the reliability of the SOI technology are investigated for gate length down to sub\|0 1 micron.
文摘We investigate how F exposure impacts the hot-carrier degradation in deep submicron NMOSFET with different technologies and device geometries for the first time. The results show that hot-carrier degradations on irradiated devices are greater than those without irradiation, especially for narrow channel device. The reason is attributed to charge traps in STI, which then induce different electric field and impact ionization rates during hotcarrier stress.
文摘A compact model for LDD MOSFET is proposed,which involves the hyperbolic tangent function description and the physics of device with emphasis on the substrate current modeling.The simulation results demonstrate good agreement with measurement,and show that deep submicron LDD MOSFET has larger substrate current than submicron device does.The improved model costs low computation consumption,and is effective in manifestation of hot carrier effect and other effects in deep submicron devices,in turn is suitable for design and reliability analysis of scaling down devices.
