This article explains the imbalance in DES and introduces the operators in IDEA. At last it puts forward a Unsym-metrical Block Encryption Algorithm which is achieved by adding some operators to DES.
In cryptography, the Triple DES (3DES, TDES or officially TDEA) is a symmetric-key block cipher which applies the Data Encryption Standard (DES) cipher algorithm three times to each data block. Electronic payment syst...In cryptography, the Triple DES (3DES, TDES or officially TDEA) is a symmetric-key block cipher which applies the Data Encryption Standard (DES) cipher algorithm three times to each data block. Electronic payment systems are known to use the TDES scheme for the encryption/decryption of data, and hence faster implementations are of great significance. Field Programmable Gate Arrays (FPGAs) offer a new solution for optimizing the performance of applications meanwhile the Triple Data Encryption Standard (TDES) offers a mean to secure information. In this paper we present a pipelined implementation in VHDL, in Electronic Code Book (EBC) mode, of this commonly used cryptography scheme with aim to improve performance. We achieve a 48-stage pipeline depth by implementing a TDES key buffer and right rotations in the DES decryption key scheduler. Using the Altera Cyclone II FPGA as our platform, we design and verify the implementation with the EDA tools provided by Altera. We gather cost and throughput information from the synthesis and timing results and compare the performance of our design to common implementations presented in other literatures. Our design achieves a throughput of 3.2 Gbps with a 50 MHz clock;a performance increase of up to 16 times.展开更多
One of the most popular standards for protecting confidential information is the Data Encryption Standard (DES). Although it has been replaced by the Advanced Encryption Standard (AES), it is still widely used in Auto...One of the most popular standards for protecting confidential information is the Data Encryption Standard (DES). Although it has been replaced by the Advanced Encryption Standard (AES), it is still widely used in Automatic Teller Machines (ATM’s), smartcards, and mobile phone SIM cards. In this paper, we present area-efficient and high-throughput FPGA implementations of the DES which are developed using the Xilinx FPGA ISE design suite. In fact, we propose modifications on the fastest DES design reported in the literature and achieve 1.1 times higher speed. Also, we introduce an 8-stage pipelined design that needs only 0.75 times the registers and consumes 0.65 times the power of a similar 16-stages pipelined design. High-speed design and synthesis optimization techniques including pipelining, register retiming, and logic replication are used. Post- layout synthesis results show that the proposed implementations achieve high throughput-to-area ratio. To make a fair comparison, the proposed designs were synthesized using matching FPGA devices as being used by other implementations reported in the literature.展开更多
DES is a kind of block cipher and before DES encryption the plain text be divided into the same-size blocks. But sometimes the plain text can’t be divided into the exactly size. So padding step is needed to pad the s...DES is a kind of block cipher and before DES encryption the plain text be divided into the same-size blocks. But sometimes the plain text can’t be divided into the exactly size. So padding step is needed to pad the space of the block. The discussion of the block padding is the emphasis of this paper. A new padding method is given and at the last part of the paper the implementation of DES using new padding method is given.展开更多
Compression and encryption are widely used in network traffic in order to improve efficiency and security of some systems.We propose a scheme to concatenate both functions and run them in a paralle pipelined fashion,d...Compression and encryption are widely used in network traffic in order to improve efficiency and security of some systems.We propose a scheme to concatenate both functions and run them in a paralle pipelined fashion,demonstrating both a hardware and a software implementation.With minor modifications to the hardware accelerators,latency can be reduced to half.Furthermore,we also propose a seminal and more efficient scheme,where we integrate the technology of encryption into the compression algorithm.Our new integrated optimization scheme reaches an increase of 1.6X by using parallel software scheme However,the security level of our new scheme is not desirable compare with previous ones.Fortunately,we prove that this does not affect the application of our schemes.展开更多
Encryption is used to secure sensitive computer data which may be at rest or in motion. There are several standard encryption algorithms that have been used to encrypt and protect blocks of sensitive data to ensure co...Encryption is used to secure sensitive computer data which may be at rest or in motion. There are several standard encryption algorithms that have been used to encrypt and protect blocks of sensitive data to ensure confidentiality. The most popular standard block encryption schemes are the Advanced Encryption Standard (AES), Triple Data Encryption Standard (3DES), and the first standardized encryption scheme, which is no longer the standard scheme now, namely the Data Encryption Standard (DES). AES is the current standard for block encryption used worldwide and is implemented on many processors. In this work, we compare the hardware performance of these three encryption schemes. First, we identified the underlying computational components for these three encryption schemes, and then we analyzed to what extent these computational components were being used in these block encryption schemes to encrypt and decrypt a given message. In this paper, we compared the contribution of these computational components to evaluate the overall encryption efficiency in terms of speed and computational delays for encrypting a given block of data for a given hardware platform. AES was found to be the faster scheme in terms of hardware computation speed in accomplishing the same encryption task compared to the other two block encryption schemes, namely, the DES and 3DES schemes.展开更多
With the increasing interconnection of computer networks and sophistication of cyber-attacks, Cryptography is one way to make sure that confidentiality, authentication, integrity, availability, and identification of d...With the increasing interconnection of computer networks and sophistication of cyber-attacks, Cryptography is one way to make sure that confidentiality, authentication, integrity, availability, and identification of data user can be maintained as well as security and privacy of data provided to the user. Symmetric key cryptography is a part of the cryptographic technique which ensures high security and confidentiality of data transmitted through the communication channel using a common key for both encryption and decryption. In this paper I have analyzed comparative encryption algorithms in performance, three most useful algorithms: Data Encryption Standard (DES), Triple DES (3DES) also known as Triple Data Encryption Algorithm (TDEA), and Advanced Encryption Standard (AES). They have been analyzed on their ability to secure data, time taken to encrypt data and throughput the algorithm requires. The performance of different algorithms differs according to the inputs.展开更多
The paper mainly discusses the integrity of the forwarded subscription message guaranteed by secure channel which encrypted in data communication by using data encryption standard （DES） algorithm and chaos code algo...The paper mainly discusses the integrity of the forwarded subscription message guaranteed by secure channel which encrypted in data communication by using data encryption standard （DES） algorithm and chaos code algorithm between broker nodes in the routing process of the contentbased publish/subscribe system. It analyzes the security of the secure channel encrypted with data communication by DES algorithm and chaos code algorithm, and finds out the secure channel can be easily attacked by known plain text. Therefore, the paper proposes the improved algorithm of message encryption and authentication, combining encryption and the generation of the message authentication code together to finish scanning at one time, which enhances both the secure degree and running efficiency. This secure channel system has a certain reference value to the pub/sub system requiring highly communication security.展开更多
After an introduction to the implementation of supervisory computer control (SCC) through networks and the relevant security issues, this paper centers on the core of network security design: intelligent front-end pro...After an introduction to the implementation of supervisory computer control (SCC) through networks and the relevant security issues, this paper centers on the core of network security design: intelligent front-end processor (FEP), encryption/decryption method and authentication protocol. Some other system-specific security measures are also proposed. Although these are examples only, the techniques discussed can also be used in and provide reference for other remote control systems.展开更多
The key generation algorithm of AES was introduced;the weaknesses of the key generation design of AES were investigated. According to the key demand put forward a kind of new design idea, and this designing strategy w...The key generation algorithm of AES was introduced;the weaknesses of the key generation design of AES were investigated. According to the key demand put forward a kind of new design idea, and this designing strategy was developed, which can be used to improve the key generation algorithm of AES. An analysis shows that such improvement can enhance the safety of the original algorithm without reducing its efficiency.展开更多
The timing and Hamming weight attacks on the data encryption standard （DES） cryptosystem for minimal cost encryption scheme is presented in this article. In the attack, timing information on encryption processing is...The timing and Hamming weight attacks on the data encryption standard （DES） cryptosystem for minimal cost encryption scheme is presented in this article. In the attack, timing information on encryption processing is used to select and collect effective plaintexts for attack. Then the collected plaintexts are utilized to infer the expanded key differences of the secret key, from which most bits of the expanded secret key are recovered. The remaining bits of the expanded secret key are deduced by the correlations between Hamming weight values of the input of the S-boxes in the first-round. Finally, from the linear relation of the encryption time and the secret key＇s Hamming weight, the entire 56 bits of the secret key are thoroughly recovered. Using the attack, the minimal cost encryption scheme can be broken with 2^23 known plaintexts and about 2^21 calculations at a success rate a 〉 99%. The attack has lower computing complexity, and the method is more effective than other previous methods.展开更多
This research aims to study various Symmetrical Algorithms, while the main objective of this study is to find out a suitable algorithm for the encryption of any specific size of text file where the experiment of each ...This research aims to study various Symmetrical Algorithms, while the main objective of this study is to find out a suitable algorithm for the encryption of any specific size of text file where the experiment of each algorithm is based on encryption of different sizes of the text files, which are in “10 KB to 5 MB”, and also to calculate the time duration that each algorithm takes to encrypt or to decrypt the particular size of each text file. There are many types of encryption algorithm, which can be used to encrypt the computerized information in different Organizations, whose all algorithms can encrypt and decrypt any size of text file, but the time duration of each Algorithm during the encryption or decryption process of specific file size is not fixed. Some of the algorithms are suitable for encryption of specific ranges of the file size, or some of algorithms are functional while encryption small size of files, and others algorithms are functional for encryption of big size of text files, based on the time duration disparity among symmetric algorithms during encryption of text files. In this study five symmetrical algorithms are merged in one program using classes and concept of inheritance in the form that if encryption is needed, the program will select the file and it checks the size of the text file. After this process the program automatically will select the suitable encryption algorithm to encrypt the specific text file according to the range of the file size. Knowing that the file size before or after encryption will not change or is stable, in this case of the decryption algorithm will apply the same process of encryption while decrypting files, the program of encryption and decryption code will write using visual Studio 2013. The result will be analyzed with R program (R software), the cipher text will appear in the format of UTF8 which means Unicode Transformation Format, “8” Means “8” bits to represent a character, the size format that will apply in the program will be in format of KB (kilo Byte).展开更多
The security of CPU smart cards, which are widely used throughout China, is currently being threatened by side-channel analysis. Typical countermeasures to side-channel analysis involve adding noise and filtering the ...The security of CPU smart cards, which are widely used throughout China, is currently being threatened by side-channel analysis. Typical countermeasures to side-channel analysis involve adding noise and filtering the power consumption signal. In this paper, we integrate appropriate preprocessing methods with an improved attack strategy to generate a key recovery solution to the shortcomings of these countermeasures. Our proposed attack strategy improves the attack result by combining information leaked from two adjacent clock cycles. Using our laboratory-based power analysis system, we verified the proposed key recovery solution by performing a successful correlation power analysis on a Triple Data Encryption Standard （3DES） hardware module in a real-life 32-bit CPU smart card. All 112 key bits of the 3DES were recovered with about 80 000 power traces.展开更多
文摘This article explains the imbalance in DES and introduces the operators in IDEA. At last it puts forward a Unsym-metrical Block Encryption Algorithm which is achieved by adding some operators to DES.
文摘In cryptography, the Triple DES (3DES, TDES or officially TDEA) is a symmetric-key block cipher which applies the Data Encryption Standard (DES) cipher algorithm three times to each data block. Electronic payment systems are known to use the TDES scheme for the encryption/decryption of data, and hence faster implementations are of great significance. Field Programmable Gate Arrays (FPGAs) offer a new solution for optimizing the performance of applications meanwhile the Triple Data Encryption Standard (TDES) offers a mean to secure information. In this paper we present a pipelined implementation in VHDL, in Electronic Code Book (EBC) mode, of this commonly used cryptography scheme with aim to improve performance. We achieve a 48-stage pipeline depth by implementing a TDES key buffer and right rotations in the DES decryption key scheduler. Using the Altera Cyclone II FPGA as our platform, we design and verify the implementation with the EDA tools provided by Altera. We gather cost and throughput information from the synthesis and timing results and compare the performance of our design to common implementations presented in other literatures. Our design achieves a throughput of 3.2 Gbps with a 50 MHz clock;a performance increase of up to 16 times.
文摘One of the most popular standards for protecting confidential information is the Data Encryption Standard (DES). Although it has been replaced by the Advanced Encryption Standard (AES), it is still widely used in Automatic Teller Machines (ATM’s), smartcards, and mobile phone SIM cards. In this paper, we present area-efficient and high-throughput FPGA implementations of the DES which are developed using the Xilinx FPGA ISE design suite. In fact, we propose modifications on the fastest DES design reported in the literature and achieve 1.1 times higher speed. Also, we introduce an 8-stage pipelined design that needs only 0.75 times the registers and consumes 0.65 times the power of a similar 16-stages pipelined design. High-speed design and synthesis optimization techniques including pipelining, register retiming, and logic replication are used. Post- layout synthesis results show that the proposed implementations achieve high throughput-to-area ratio. To make a fair comparison, the proposed designs were synthesized using matching FPGA devices as being used by other implementations reported in the literature.
文摘DES is a kind of block cipher and before DES encryption the plain text be divided into the same-size blocks. But sometimes the plain text can’t be divided into the exactly size. So padding step is needed to pad the space of the block. The discussion of the block padding is the emphasis of this paper. A new padding method is given and at the last part of the paper the implementation of DES using new padding method is given.
基金partially supported by National Natural Science Foundation of China(No. 61202475,61572294,61502218)Outstanding Young Scientists Foundation Grant of Shandong Province(No.BS2014DX016)+3 种基金Nature Science Foundation of Shandong Province (No.ZR2012FQ029)Ph.D.Programs Foundation of Ludong University(No.LY2015033)Fujian Provincial Key Laboratory of Network Security and Cryptology Research Fund(Fujian Normal University)(No.15004)the Priority Academic Program Development of Jiangsu Higer Education Institutions,Jiangsu Collaborative Innovation Center on Atmospheric Environment and Equipment Technology
文摘Compression and encryption are widely used in network traffic in order to improve efficiency and security of some systems.We propose a scheme to concatenate both functions and run them in a paralle pipelined fashion,demonstrating both a hardware and a software implementation.With minor modifications to the hardware accelerators,latency can be reduced to half.Furthermore,we also propose a seminal and more efficient scheme,where we integrate the technology of encryption into the compression algorithm.Our new integrated optimization scheme reaches an increase of 1.6X by using parallel software scheme However,the security level of our new scheme is not desirable compare with previous ones.Fortunately,we prove that this does not affect the application of our schemes.
文摘Encryption is used to secure sensitive computer data which may be at rest or in motion. There are several standard encryption algorithms that have been used to encrypt and protect blocks of sensitive data to ensure confidentiality. The most popular standard block encryption schemes are the Advanced Encryption Standard (AES), Triple Data Encryption Standard (3DES), and the first standardized encryption scheme, which is no longer the standard scheme now, namely the Data Encryption Standard (DES). AES is the current standard for block encryption used worldwide and is implemented on many processors. In this work, we compare the hardware performance of these three encryption schemes. First, we identified the underlying computational components for these three encryption schemes, and then we analyzed to what extent these computational components were being used in these block encryption schemes to encrypt and decrypt a given message. In this paper, we compared the contribution of these computational components to evaluate the overall encryption efficiency in terms of speed and computational delays for encrypting a given block of data for a given hardware platform. AES was found to be the faster scheme in terms of hardware computation speed in accomplishing the same encryption task compared to the other two block encryption schemes, namely, the DES and 3DES schemes.
文摘With the increasing interconnection of computer networks and sophistication of cyber-attacks, Cryptography is one way to make sure that confidentiality, authentication, integrity, availability, and identification of data user can be maintained as well as security and privacy of data provided to the user. Symmetric key cryptography is a part of the cryptographic technique which ensures high security and confidentiality of data transmitted through the communication channel using a common key for both encryption and decryption. In this paper I have analyzed comparative encryption algorithms in performance, three most useful algorithms: Data Encryption Standard (DES), Triple DES (3DES) also known as Triple Data Encryption Algorithm (TDEA), and Advanced Encryption Standard (AES). They have been analyzed on their ability to secure data, time taken to encrypt data and throughput the algorithm requires. The performance of different algorithms differs according to the inputs.
基金Supported by the National Natural Science Foun-dation of China (60273014)
文摘The paper mainly discusses the integrity of the forwarded subscription message guaranteed by secure channel which encrypted in data communication by using data encryption standard （DES） algorithm and chaos code algorithm between broker nodes in the routing process of the contentbased publish/subscribe system. It analyzes the security of the secure channel encrypted with data communication by DES algorithm and chaos code algorithm, and finds out the secure channel can be easily attacked by known plain text. Therefore, the paper proposes the improved algorithm of message encryption and authentication, combining encryption and the generation of the message authentication code together to finish scanning at one time, which enhances both the secure degree and running efficiency. This secure channel system has a certain reference value to the pub/sub system requiring highly communication security.
文摘After an introduction to the implementation of supervisory computer control (SCC) through networks and the relevant security issues, this paper centers on the core of network security design: intelligent front-end processor (FEP), encryption/decryption method and authentication protocol. Some other system-specific security measures are also proposed. Although these are examples only, the techniques discussed can also be used in and provide reference for other remote control systems.
文摘The key generation algorithm of AES was introduced;the weaknesses of the key generation design of AES were investigated. According to the key demand put forward a kind of new design idea, and this designing strategy was developed, which can be used to improve the key generation algorithm of AES. An analysis shows that such improvement can enhance the safety of the original algorithm without reducing its efficiency.
基金supported by the National Basic Research Program of China (2007CB807902, 2007CB807903)the Education Innovation Foundation of Institution and University of Beijing (2004).
文摘The timing and Hamming weight attacks on the data encryption standard （DES） cryptosystem for minimal cost encryption scheme is presented in this article. In the attack, timing information on encryption processing is used to select and collect effective plaintexts for attack. Then the collected plaintexts are utilized to infer the expanded key differences of the secret key, from which most bits of the expanded secret key are recovered. The remaining bits of the expanded secret key are deduced by the correlations between Hamming weight values of the input of the S-boxes in the first-round. Finally, from the linear relation of the encryption time and the secret key＇s Hamming weight, the entire 56 bits of the secret key are thoroughly recovered. Using the attack, the minimal cost encryption scheme can be broken with 2^23 known plaintexts and about 2^21 calculations at a success rate a 〉 99%. The attack has lower computing complexity, and the method is more effective than other previous methods.
文摘This research aims to study various Symmetrical Algorithms, while the main objective of this study is to find out a suitable algorithm for the encryption of any specific size of text file where the experiment of each algorithm is based on encryption of different sizes of the text files, which are in “10 KB to 5 MB”, and also to calculate the time duration that each algorithm takes to encrypt or to decrypt the particular size of each text file. There are many types of encryption algorithm, which can be used to encrypt the computerized information in different Organizations, whose all algorithms can encrypt and decrypt any size of text file, but the time duration of each Algorithm during the encryption or decryption process of specific file size is not fixed. Some of the algorithms are suitable for encryption of specific ranges of the file size, or some of algorithms are functional while encryption small size of files, and others algorithms are functional for encryption of big size of text files, based on the time duration disparity among symmetric algorithms during encryption of text files. In this study five symmetrical algorithms are merged in one program using classes and concept of inheritance in the form that if encryption is needed, the program will select the file and it checks the size of the text file. After this process the program automatically will select the suitable encryption algorithm to encrypt the specific text file according to the range of the file size. Knowing that the file size before or after encryption will not change or is stable, in this case of the decryption algorithm will apply the same process of encryption while decrypting files, the program of encryption and decryption code will write using visual Studio 2013. The result will be analyzed with R program (R software), the cipher text will appear in the format of UTF8 which means Unicode Transformation Format, “8” Means “8” bits to represent a character, the size format that will apply in the program will be in format of KB (kilo Byte).
基金supported by the Major Program“Core of Electronic DevicesHigh-End General Chips+1 种基金and Basis of Software Products”of the Ministry of Industry and Information Technology of China(No.2014ZX01032205)the Key Technologies Research and Development Program of the Twelfth Five-Year Plan of China(No.MMJJ201401009)
文摘The security of CPU smart cards, which are widely used throughout China, is currently being threatened by side-channel analysis. Typical countermeasures to side-channel analysis involve adding noise and filtering the power consumption signal. In this paper, we integrate appropriate preprocessing methods with an improved attack strategy to generate a key recovery solution to the shortcomings of these countermeasures. Our proposed attack strategy improves the attack result by combining information leaked from two adjacent clock cycles. Using our laboratory-based power analysis system, we verified the proposed key recovery solution by performing a successful correlation power analysis on a Triple Data Encryption Standard （3DES） hardware module in a real-life 32-bit CPU smart card. All 112 key bits of the 3DES were recovered with about 80 000 power traces.
