The high working junction temperature of power component is the most common reason of its failure. So the thermal design is of vital importance in electronic control unit （ECU） design. By means of circuit simulation...The high working junction temperature of power component is the most common reason of its failure. So the thermal design is of vital importance in electronic control unit （ECU） design. By means of circuit simulation, the thermal design of ECU for electronic unit pump （EUP） fuel system is applied. The power dissipation model of each power component in the ECU is created and simulated. According to the analyses of simulation results, the factors which affect the power dissipation of components are analyzed. Then the ways for reducing the power dissipation of power components are carried out. The power dissipation of power components at different engine state is calculated and analyzed. The maximal power dissipation of each power component in all possible engine state is also carried out based on these simulations. A cooling system is designed based on these studies. The tests show that the maximum total power dissipation of ECU drops from 43.2 W to 33.84 W after these simulations and optimizations. These applications of simulations in thermal design of ECU can greatly increase the quality of the design, save the design cost and shorten design time展开更多
A design of a replica bit line control circuit to optimize power for SRAM is proposed. The proposed design overcomes the limitations of the traditional replica bit line control circuit, which cannot shut off the word ...A design of a replica bit line control circuit to optimize power for SRAM is proposed. The proposed design overcomes the limitations of the traditional replica bit line control circuit, which cannot shut off the word line in time. In the novel design, the delay of word line enable and disable paths are balanced. Thus, the word line can be opened and shut off in time. Moreover, the chip select signal is decomposed, which prevents feedback oscillations caused by the replica bit line and the replica word line. As a result, the switch power caused by unnec- essary discharging of the bit line is reduced. A 2-kb SRAM is fully custom designed in an SMIC 65-nm CMOS process. The traditional replica bit line control circuit and the new replica bit line control circuit are used in the designed SRAM, and their performances are compared with each other. The experimental results show that at a supply voltage of 1.2 V, the switch power consumption of the memory array can be reduced by 53.7%.展开更多
文摘The high working junction temperature of power component is the most common reason of its failure. So the thermal design is of vital importance in electronic control unit （ECU） design. By means of circuit simulation, the thermal design of ECU for electronic unit pump （EUP） fuel system is applied. The power dissipation model of each power component in the ECU is created and simulated. According to the analyses of simulation results, the factors which affect the power dissipation of components are analyzed. Then the ways for reducing the power dissipation of power components are carried out. The power dissipation of power components at different engine state is calculated and analyzed. The maximal power dissipation of each power component in all possible engine state is also carried out based on these simulations. A cooling system is designed based on these studies. The tests show that the maximum total power dissipation of ECU drops from 43.2 W to 33.84 W after these simulations and optimizations. These applications of simulations in thermal design of ECU can greatly increase the quality of the design, save the design cost and shorten design time
基金Project supported by the Zhejiang Provincial Natural Science Foundation of China(No.LQ14F040001)the National Natural Science Foundation of China(Nos.61274132,61234002,61474068)the K.C.Wong Magna Fund in Ningbo University
文摘A design of a replica bit line control circuit to optimize power for SRAM is proposed. The proposed design overcomes the limitations of the traditional replica bit line control circuit, which cannot shut off the word line in time. In the novel design, the delay of word line enable and disable paths are balanced. Thus, the word line can be opened and shut off in time. Moreover, the chip select signal is decomposed, which prevents feedback oscillations caused by the replica bit line and the replica word line. As a result, the switch power caused by unnec- essary discharging of the bit line is reduced. A 2-kb SRAM is fully custom designed in an SMIC 65-nm CMOS process. The traditional replica bit line control circuit and the new replica bit line control circuit are used in the designed SRAM, and their performances are compared with each other. The experimental results show that at a supply voltage of 1.2 V, the switch power consumption of the memory array can be reduced by 53.7%.
