期刊文献+
共找到2篇文章
< 1 >
每页显示 20 50 100
De-blocking adaptive feedback control design for shared-buffer CIOQ switching architecture
1
作者 Rui ZHENG Jianliang SHEN +4 位作者 Fan ZHANG Ping LV Peijie LI Yu SHAO Zhengbin ZHU 《ENGINEERING Information Technology & Electronic Engineering》 2026年第3期1-18,共18页
To address the issues of head-of-line(HOL)blocking at the virtual output queue(VOQ)level,packet loss,and congestion spreading caused by buffer overflow in the shared-buffer-based combined input and output queued(CIOQ)... To address the issues of head-of-line(HOL)blocking at the virtual output queue(VOQ)level,packet loss,and congestion spreading caused by buffer overflow in the shared-buffer-based combined input and output queued(CIOQ)switching architecture,while enhancing its performance and stability,we propose a de-blocking adaptive feedback control(AFC)design in this study.The introduction of the credit timeout detection mechanism(CTDM)enables the CIOQ to achieve theoretical 100%non-blocking state,effectively eliminating the impact of HOL blocking.With the combined effect of the proposed VOQ dynamic regulation algorithm(VDRA)and threshold dynamic adaptive algorithm(TDAA),it can reduce the risk of congestion spreading caused by buffer overflow and consequently improve the overall performance of the system.Both theoretical analysis and experimental results demonstrate that,under typical traffic conditions,the proposed design achieves a maximum throughput of 1499.66 Gb/s and a minimum latency of 83 ns.Additionally,the effective throughput ratio reaches 96.94%,with a data link layer packet(DLLP)loss ratio of merely 0.61%and a packet loss rate as low as 0.6%.In comparison with traditional CIOQ and input queued(IQ)switch architectures,the proposed design demonstrates improvements in throughput by 15.12%and 20.55%,and forwarding latency is reduced by 26.9%and 54.7%,respectively,and the system stability is stronger,which can fully satisfy the demand for data exchange in complex situations. 展开更多
关键词 Shared-buffer CIOQ switching architecture Head-of-line(HOL)blocking Congestion spreading Adaptive feedback control(AFC) Peripheral component interconnect express(PCIe)interconnect protocol
在线阅读 下载PDF
基于CompactPCI Express总线的计算机体系架构研究 被引量:2
2
作者 郭峰 林光福 鲜于运香 《工业控制计算机》 2011年第11期15-17,共3页
针对CompactPCI Express总线的强势发展势头,对其系统架构展开了研究。介绍了CompactPCI Express总线的由来以及CompactPCI Express总线的技术特点和优势。详细介绍了CompactPCI Express总线计算机系统的体系架构,CompactPCI Express总... 针对CompactPCI Express总线的强势发展势头,对其系统架构展开了研究。介绍了CompactPCI Express总线的由来以及CompactPCI Express总线的技术特点和优势。详细介绍了CompactPCI Express总线计算机系统的体系架构,CompactPCI Express总线体系结构,交换模块、桥接模块及高速串行总线方面的研究。最后对CompactPCI Express总线系统的发展前景作了描述。 展开更多
关键词 compactpci express 体系架构 交换
在线阅读 下载PDF
上一页 1 下一页 到第
使用帮助 返回顶部