As an important branch of information security algorithms,the efficient and flexible implementation of stream ciphers is vital.Existing implementation methods,such as FPGA,GPP and ASIC,provide a good support,but they ...As an important branch of information security algorithms,the efficient and flexible implementation of stream ciphers is vital.Existing implementation methods,such as FPGA,GPP and ASIC,provide a good support,but they could not achieve a better tradeoff between high speed processing and high flexibility.ASIC has fast processing speed,but its flexibility is poor,GPP has high flexibility,but the processing speed is slow,FPGA has high flexibility and processing speed,but the resource utilization is very low.This paper studies a stream cryptographic processor which can efficiently and flexibly implement a variety of stream cipher algorithms.By analyzing the structure model,processing characteristics and storage characteristics of stream ciphers,a reconfigurable stream cryptographic processor with special instructions based on VLIW is presented,which has separate/cluster storage structure and is oriented to stream cipher operations.The proposed instruction structure can effectively support stream cipher processing with multiple data bit widths,parallelism among stream cipher processing with different data bit widths,and parallelism among branch control and stream cipher processing with high instruction level parallelism;the designed separate/clustered special bit registers and general register heaps,key register heaps can satisfy cryptographic requirements.So the proposed processor not only flexibly accomplishes the combination of multiple basic stream cipher operations to finish stream cipher algorithms.It has been implemented with 0.18μm CMOS technology,the test results show that the frequency can reach 200 MHz,and power consumption is 310 mw.Ten kinds of stream ciphers were realized in the processor.The key stream generation throughput of Grain-80,W7,MICKEY,ACHTERBAHN and Shrink algorithm is 100 Mbps,66.67 Mbps,66.67 Mbps,50 Mbps and 800 Mbps,respectively.The test result shows that the processor presented can achieve good tradeoff between high performance and flexibility of stream ciphers.展开更多
可重构密码流体系结构是一种面向密码运算的新型体系结构,但存在着超长指令字(VLIW)代码稀疏和Kernel体积过大的问题。该文以可重构密码流处理架构S-RCCPA为研究平台,通过大量密码算法在S-RCCPA架构上的适配分析,提出了VLIW可重构技术,...可重构密码流体系结构是一种面向密码运算的新型体系结构,但存在着超长指令字(VLIW)代码稀疏和Kernel体积过大的问题。该文以可重构密码流处理架构S-RCCPA为研究平台,通过大量密码算法在S-RCCPA架构上的适配分析,提出了VLIW可重构技术,并设计了Kernel级指令集、VLIW可重构算法及指令可重构单元。实验证明,该技术能够有效提高VLIW的指令密度,同时降低了VLIW的指令宽度,使得整个Kernel体积减小了约33.3%,并将微码存储器的容量由96 k B降为64 k B,有效降低芯片整体面积和系统功耗。展开更多
基金supported by National Natural Science Foundation of China with granted No.61404175
文摘As an important branch of information security algorithms,the efficient and flexible implementation of stream ciphers is vital.Existing implementation methods,such as FPGA,GPP and ASIC,provide a good support,but they could not achieve a better tradeoff between high speed processing and high flexibility.ASIC has fast processing speed,but its flexibility is poor,GPP has high flexibility,but the processing speed is slow,FPGA has high flexibility and processing speed,but the resource utilization is very low.This paper studies a stream cryptographic processor which can efficiently and flexibly implement a variety of stream cipher algorithms.By analyzing the structure model,processing characteristics and storage characteristics of stream ciphers,a reconfigurable stream cryptographic processor with special instructions based on VLIW is presented,which has separate/cluster storage structure and is oriented to stream cipher operations.The proposed instruction structure can effectively support stream cipher processing with multiple data bit widths,parallelism among stream cipher processing with different data bit widths,and parallelism among branch control and stream cipher processing with high instruction level parallelism;the designed separate/clustered special bit registers and general register heaps,key register heaps can satisfy cryptographic requirements.So the proposed processor not only flexibly accomplishes the combination of multiple basic stream cipher operations to finish stream cipher algorithms.It has been implemented with 0.18μm CMOS technology,the test results show that the frequency can reach 200 MHz,and power consumption is 310 mw.Ten kinds of stream ciphers were realized in the processor.The key stream generation throughput of Grain-80,W7,MICKEY,ACHTERBAHN and Shrink algorithm is 100 Mbps,66.67 Mbps,66.67 Mbps,50 Mbps and 800 Mbps,respectively.The test result shows that the processor presented can achieve good tradeoff between high performance and flexibility of stream ciphers.
文摘可重构密码流体系结构是一种面向密码运算的新型体系结构,但存在着超长指令字(VLIW)代码稀疏和Kernel体积过大的问题。该文以可重构密码流处理架构S-RCCPA为研究平台,通过大量密码算法在S-RCCPA架构上的适配分析,提出了VLIW可重构技术,并设计了Kernel级指令集、VLIW可重构算法及指令可重构单元。实验证明,该技术能够有效提高VLIW的指令密度,同时降低了VLIW的指令宽度,使得整个Kernel体积减小了约33.3%,并将微码存储器的容量由96 k B降为64 k B,有效降低芯片整体面积和系统功耗。
