Organic field-effect transistors (OFETs), with their potential for low-cost manufacturing and compatibility with flexible substrates,have emerged as an indispensable element in next-generation electronics. However, th...Organic field-effect transistors (OFETs), with their potential for low-cost manufacturing and compatibility with flexible substrates,have emerged as an indispensable element in next-generation electronics. However, the existing OFETs are significantlyhindered by their lack of reconfigurability and multifunctionality for application in complex electronic systems. To addressthese limitations, we propose a novel design strategy to develop a dual-gate organic field-effect transistor (DG-OFET), primarilyfeaturing a synergistic combination of interface charge trapping and the nonvolatile nature of ferroelectric polarization, whichrealizes the multifunctional integration within a single platform. Specifically, the DG-OFET can be utilized as synaptic devicesthat can successfully perform both short-term and long-term synaptic plasticity by manipulating the input gate of artificial pulsevoltages, depending on the switching mechanism between bottom-gate controlled electrostatic doping and top-gate inducedferroelectric polarization. Besides, the presynaptic spike applied to a specific gate electrode can trigger the excitatory andinhibitory postsynaptic current response. The potentiation and depression of synaptic weight are mimicked by consecutivepositive and negative spikes, respectively. The dual-gate coupling strategy further expands its functionality towards simulatingthe operation of logic gates. By modulating the combination of dual-gate input signals, the channel conductivity can analogouslyperform a family of elementary Boolean logic operations, including AND, OR, NAND, NOR, XOR, and XNOR. Theseresults highlight the electronic reconfigurability of DG-OFET and tremendous potential for applications in energy-efficientneuromorphic computing networks and organic circuits, thus providing a versatile strategy for the development of advancedand efficient multifunctional integration.展开更多
This paper proposes a kind of programmable logic element(PLE)based on Sense-Switch pFLASH technology.By programming Sense-Switch pFLASH,all three-bit look-up table(LUT3)functions,partial four-bit look-up table(LUT4)fu...This paper proposes a kind of programmable logic element(PLE)based on Sense-Switch pFLASH technology.By programming Sense-Switch pFLASH,all three-bit look-up table(LUT3)functions,partial four-bit look-up table(LUT4)functions,latch functions,and d flip flop(DFF)with enable and reset functions can be realized.Because PLE uses a choice of operational logic(COOL)approach for the operation of logic functions,it allows any logic circuit to be implemented at any ratio of combinatorial logic to register.This intrinsic property makes it close to the basic application specific integrated circuit(ASIC)cell in terms of fine granularity,thus allowing ASIC-like cell-based mappers to apply all their optimization potential.By measuring Sense-Switch pFLASH and PLE circuits,the results show that the“on”state driving current of the Sense-Switch pFLASH is about 245.52μA,and that the“off”state leakage current is about 0.1 pA.The programmable function of PLE works normally.The delay of the typical combinatorial logic operation AND3 is 0.69 ns,and the delay of the sequential logic operation DFF is 0.65 ns,both of which meet the requirements of the design technical index.展开更多
基金supported by the Ministry of Science and Technology of the People's Republic of China(2022YFB3603804)Natural Science Foundation of Shanghai Municipality(22ZR1407800).
文摘Organic field-effect transistors (OFETs), with their potential for low-cost manufacturing and compatibility with flexible substrates,have emerged as an indispensable element in next-generation electronics. However, the existing OFETs are significantlyhindered by their lack of reconfigurability and multifunctionality for application in complex electronic systems. To addressthese limitations, we propose a novel design strategy to develop a dual-gate organic field-effect transistor (DG-OFET), primarilyfeaturing a synergistic combination of interface charge trapping and the nonvolatile nature of ferroelectric polarization, whichrealizes the multifunctional integration within a single platform. Specifically, the DG-OFET can be utilized as synaptic devicesthat can successfully perform both short-term and long-term synaptic plasticity by manipulating the input gate of artificial pulsevoltages, depending on the switching mechanism between bottom-gate controlled electrostatic doping and top-gate inducedferroelectric polarization. Besides, the presynaptic spike applied to a specific gate electrode can trigger the excitatory andinhibitory postsynaptic current response. The potentiation and depression of synaptic weight are mimicked by consecutivepositive and negative spikes, respectively. The dual-gate coupling strategy further expands its functionality towards simulatingthe operation of logic gates. By modulating the combination of dual-gate input signals, the channel conductivity can analogouslyperform a family of elementary Boolean logic operations, including AND, OR, NAND, NOR, XOR, and XNOR. Theseresults highlight the electronic reconfigurability of DG-OFET and tremendous potential for applications in energy-efficientneuromorphic computing networks and organic circuits, thus providing a versatile strategy for the development of advancedand efficient multifunctional integration.
基金supported by the National Natural Science Foundation of China(No.62174150)the Natural Science Foundation of Jiangsu Province,China(Nos.BK20211040 and BK20211041)。
文摘This paper proposes a kind of programmable logic element(PLE)based on Sense-Switch pFLASH technology.By programming Sense-Switch pFLASH,all three-bit look-up table(LUT3)functions,partial four-bit look-up table(LUT4)functions,latch functions,and d flip flop(DFF)with enable and reset functions can be realized.Because PLE uses a choice of operational logic(COOL)approach for the operation of logic functions,it allows any logic circuit to be implemented at any ratio of combinatorial logic to register.This intrinsic property makes it close to the basic application specific integrated circuit(ASIC)cell in terms of fine granularity,thus allowing ASIC-like cell-based mappers to apply all their optimization potential.By measuring Sense-Switch pFLASH and PLE circuits,the results show that the“on”state driving current of the Sense-Switch pFLASH is about 245.52μA,and that the“off”state leakage current is about 0.1 pA.The programmable function of PLE works normally.The delay of the typical combinatorial logic operation AND3 is 0.69 ns,and the delay of the sequential logic operation DFF is 0.65 ns,both of which meet the requirements of the design technical index.
