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Evolutionary neural architecture search for traffic sign recognition
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作者 SONG Changwei MA Yongjie +1 位作者 PING Haoyu SUN Lisheng 《Optoelectronics Letters》 2025年第7期434-440,共7页
Convolutional neural networks(CNNs)exhibit superior performance in image feature extraction,making them extensively used in the area of traffic sign recognition.However,the design of existing traffic sign recognition ... Convolutional neural networks(CNNs)exhibit superior performance in image feature extraction,making them extensively used in the area of traffic sign recognition.However,the design of existing traffic sign recognition algorithms often relies on expert knowledge to enhance the image feature extraction networks,necessitating image preprocessing and model parameter tuning.This increases the complexity of the model design process.This study introduces an evolutionary neural architecture search(ENAS)algorithm for the automatic design of neural network models tailored for traffic sign recognition.By integrating the construction parameters of residual network(ResNet)into evolutionary algorithms(EAs),we automatically generate lightweight networks for traffic sign recognition,utilizing blocks as the fundamental building units.Experimental evaluations on the German traffic sign recognition benchmark(GTSRB)dataset reveal that the algorithm attains a recognition accuracy of 99.32%,with a mere 2.8×10^(6)parameters.Experimental results comparing the proposed method with other traffic sign recognition algorithms demonstrate that the method can more efficiently discover neural network architectures,significantly reducing the number of network parameters while maintaining recognition accuracy. 展开更多
关键词 traffic sign recognitionhoweverthe expert knowledge image feature extraction model parameter tuningthis evolutionary neural architecture search enas algorithm traffic sign recognition model design image preprocessing
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Architecture Optimization of More Electric Aircraft Actuation System 被引量:14
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作者 QI Haitao FU Yongling +1 位作者 QI Xiaoye LANG Yan 《Chinese Journal of Aeronautics》 SCIE EI CAS CSCD 2011年第4期506-513,共8页
The optional types of power source and actuator in the aircraft are more and more diverse due to fast development in more electric technology, which makes the combinations of different power sources and actuators beco... The optional types of power source and actuator in the aircraft are more and more diverse due to fast development in more electric technology, which makes the combinations of different power sources and actuators become extremely complex in the architecture optimization process of airborne actuation system. The traditional "trial and error" method cannot satisfy the design demands. In this paper, firstly, the composition of more electric aircraft (MEA) flight control actuation system (FCAS) is introduced, and the possible architecture quantity is calculated. Secondly, the evaluation criteria of FCAS architecture with respect to safe reliability, weight and efficiency are proposed, and the evaluation criteria values are calculated in the case that each control surface adopts the same actuator configuration. Finally, the optimization results of MEA FCAS architecture are obtained by applying genetic algorithm (GA). Compared to the traditional actuation system architecture, which only adopts servo valve controlled hydraulic actuators, the weight of the optimized more electric actuation system architecture can be reduced by 6%, and the efficiency can be improved by 30% based on the safe reliability requirements. 展开更多
关键词 more electric aircraft power-by-wire actuation system architecture multiobjective optimization genetic algorithms
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Virtual reconfigurable architecture for evolving combinational logic circuits 被引量:5
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作者 王进 LEE Chong-Ho 《Journal of Central South University》 SCIE EI CAS 2014年第5期1862-1870,共9页
A virtual reconfigurable architecture(VRA)-based evolvable hardware is proposed for automatic synthesis of combinational logic circuits at gate-level.The proposed VRA is implemented by a Celoxica RC1000 peripheral com... A virtual reconfigurable architecture(VRA)-based evolvable hardware is proposed for automatic synthesis of combinational logic circuits at gate-level.The proposed VRA is implemented by a Celoxica RC1000 peripheral component interconnect(PCI)board with an Xilinx Virtex xcv2000E field programmable gate array(FPGA).To improve the quality of the evolved circuits,the VRA works through a two-stage evolution: finding a functional circuit and minimizing the number of logic gates used in a feasible circuit.To optimize the algorithm performance in the two-stage evolutionary process and set free the user from the time-consuming process of mutation parameter tuning,a self-adaptive mutation rate control(SAMRC)scheme is introduced.In the evolutionary process,the mutation rate control parameters are encoded as additional genes in the chromosome and also undergo evolutionary operations.The efficiency of the proposed methodology is tested with the evolutions of a 4-bit even parity function,a 2-bit multiplier,and a 3-bit multiplier.The obtained results demonstrate that our scheme improves the evolutionary design of combinational logic circuits in terms of quality of the evolved circuit as well as the computational effort,when compared to the existing evolvable hardware approaches. 展开更多
关键词 evolutionary algorithm evolvable hardware self-adaptive mutation rate control virtual reconfigurable architecture
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A Creative Approach to Reducing Ambiguity in Scenario-based Software Architecture Analysis 被引量:1
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作者 Xi-Wen Wu Chen Li +1 位作者 Xuan Wang Hong-Ji Yang 《International Journal of Automation and computing》 EI CSCD 2019年第2期248-260,共13页
In software engineering, a scenario describes an anticipated usage of a software system. As scenarios are useful to understand the requirements and functionalities of a software system, the scenario-based analysis is ... In software engineering, a scenario describes an anticipated usage of a software system. As scenarios are useful to understand the requirements and functionalities of a software system, the scenario-based analysis is widely used in various tasks, especially in the design stage of software architectures. Although researchers have proposed various scenario-based approaches to analyse software architecture, there are still limitations in this research field, and a key limitation is that scenarios are typically not formally defined and thus may contain ambiguities. As these ambiguities may lead to defects, it is desirable to reduce them as many as possible. In order to reduce ambiguity in scenario-based software architecture analysis, this paper introduces a creative computing approach to scenario-based software requirements analysis. Our work expands this idea in three directions. Firstly, we extend an architecture description language(ADL)-based language – Breeze/ADL to model the software architecture. Secondly, we use a creative rule – combinational rule(CR) to combine the vector clock algorithm for reducing the ambiguities in modelling scenarios. Then, another creative rule – transformational rule(TR) is employed to help to transform our Breeze/ADL model to a popular model – unified modelling language(UML) model. We implement our approach as a plugin of Breeze, and illustrate a running example of modelling a poetry to music system in our case study.Our results show the proposed creative approach is able to reduce ambiguities of the software architecture in practice. 展开更多
关键词 Creative computing vector clock algorithm scenario-based analysis of SOFTWARE architecture sequence diagram Breeze/ architecture description language (ADL)
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A Review of Blockchain Layered Architecture and Technology Application Research 被引量:2
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作者 WANG Changjing JIANG Huiwen +3 位作者 ZENG Jingshan YU Min HUANG Qing ZUO Zhengkang 《Wuhan University Journal of Natural Sciences》 CAS CSCD 2021年第5期415-428,共14页
The development of blockchain is at a nascent stage.Current research on blockchain mainly focuses on a single technology,failing to reflect the correlation between the integrated technologies due to a lack of applicat... The development of blockchain is at a nascent stage.Current research on blockchain mainly focuses on a single technology,failing to reflect the correlation between the integrated technologies due to a lack of application in the real world.In this paper,according to the function classification,we divide blockchain technology into five layers:the data layer,the network layer,the consensus layer,the contract layer,and the application layer.For each layer,we elaborate on its technical principles and the latest research status.We also provide empirical cases of blockchain application.This paper summarizes the general functional modules of the blockchain to support the rapid implementation of blockchain applications.In the end,we investigate the challenges faced by blockchain technology and present the research prospects. 展开更多
关键词 blockchain architecture consensus algorithm smart contract cross-chain service blockchain application
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Design and Implementation of Dynamic High-Speed Switches in Super Base Station Architectures 被引量:1
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作者 Yingjiao Ma Jinglin Shi +2 位作者 Yiqing Zhou Lin Tian Manli Qian 《China Communications》 SCIE CSCD 2020年第3期78-89,共12页
Novel centralized base station architectures integrating computation and communication functionalities have become important for the development of future mobile communication networks.Therefore,the development of dyn... Novel centralized base station architectures integrating computation and communication functionalities have become important for the development of future mobile communication networks.Therefore,the development of dynamic high-speed interconnections between baseband units(BBUs)and remote radio heads(RRHs)is vital in centralized base station design.Herein,dynamic high-speed switches(HSSs)connecting BBUs and RRHs were designed for a centralized base station architecture.We analyzed the characteristics of actual traffic and introduced a switch traffic model suitable for the super base station architecture.Then,we proposed a data-priority-aware(DPA)scheduling algorithm based on the traffic model.Lastly,we developed the dynamic HSS model based on the OPNET platform and the prototype based on FPGA.Our results show that the DPA achieves close to 100%throughput with lower latency and provides better run-time complexity than iOCF and HE-iSLIP,thereby demonstrating that the proposed switch system can be adopted in centralized base station architectures. 展开更多
关键词 centralized BASE STATION architectureS DYNAMIC high-speed switch scheduling algorithm BBU RRH super BASE STATION
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The determination of the link with the smallest end-to-end network latency in ethernet architecture 被引量:3
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作者 梁永生 张乃通 《Journal of Harbin Institute of Technology(New Series)》 EI CAS 2007年第4期489-495,共7页
Ethernet fundamental and its data transmission model are introduced in brief and end-to-end network latency was analyzed in this paper. On the premise of not considering transmission quality and transmission cost, lat... Ethernet fundamental and its data transmission model are introduced in brief and end-to-end network latency was analyzed in this paper. On the premise of not considering transmission quality and transmission cost, latency was the function of the rest of network resource parameter (NRP). The relation between the number of nodes and that of end-to-end links was presented. In ethernet architecture, the algorithm to determine the link with the smallest latency is a polynomial issue when the number of network nodes is limited, so it can be solved by way of polynomial equations. Latency measuring is the key issue to determine the link with the smallest network latency. 3-node brigade (regiment) level network centric warfare (NCW) demonstration platform was studied and the latency between the detectors and weapon control stations was taken as an example. The algorithm of end-to-end network latency and link information in NCW was presented. The algorithm program based on Server/Client architecture was developed. The data transmission optimal link is one whose end-to-end latency is the smallest. This paper solves the key issue to determine the link whose end-to-end latency is the smallest in ethernet architecture. The study can be widely applied to determine the optimal link which is in the complex network environment of multiple service provision points. 展开更多
关键词 ethernet architecture metwork latency link with the smallest network latency network centric warfare (NCW) network latency algorithm
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Distributed MPC for Reconfigurable Architecture Systems via Alternating Direction Method of Multipliers 被引量:1
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作者 Ting Bai Shaoyuan Li Yuanyuan Zou 《IEEE/CAA Journal of Automatica Sinica》 SCIE EI CSCD 2021年第7期1336-1344,共9页
This paper investigates the distributed model predictive control(MPC)problem of linear systems where the network topology is changeable by the way of inserting new subsystems,disconnecting existing subsystems,or merel... This paper investigates the distributed model predictive control(MPC)problem of linear systems where the network topology is changeable by the way of inserting new subsystems,disconnecting existing subsystems,or merely modifying the couplings between different subsystems.To equip live systems with a quick response ability when modifying network topology,while keeping a satisfactory dynamic performance,a novel reconfiguration control scheme based on the alternating direction method of multipliers(ADMM)is presented.In this scheme,the local controllers directly influenced by the structure realignment are redesigned in the reconfiguration control.Meanwhile,by employing the powerful ADMM algorithm,the iterative formulas for solving the reconfigured optimization problem are obtained,which significantly accelerate the computation speed and ensure a timely output of the reconfigured optimal control response.Ultimately,the presented reconfiguration scheme is applied to the level control of a benchmark four-tank plant to illustrate its effectiveness and main characteristics. 展开更多
关键词 Alternating direction method of multipliers(ADMM)algorithm distributed control model predictive control(MPC) reconfigurable architecture systems.
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Research on Architecture Design with High Reliability of Network Nodes in the Amphibious Combating Simulation System
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作者 LIU Yu ZHANG Lili LUO Rufen 《Wuhan University Journal of Natural Sciences》 CAS CSCD 2019年第6期537-548,共12页
Upper-lower computer mode is the main architecture design of the amphibious combat simulation system(ACSS)at present.Through continuous improvement of real-time performance,software and hardware infrastructure,the exp... Upper-lower computer mode is the main architecture design of the amphibious combat simulation system(ACSS)at present.Through continuous improvement of real-time performance,software and hardware infrastructure,the exponential growth of operational network data scale is realized,but the availability performance of ACSS declines.The reliability of the working host as the key node has become the bottleneck of the overall availability of network nodes in the ACSS.To optimize the network node architecture of ACSS,this paper presents an effective optimization solution by designing the dual redundancy warm-standby module of the mission computer and I/O port,the algorithm of selecting output path of the mission computer in network nodes,the decision-making algorithm upon the on-duty host and output,and the video output decision-making algorithm upon the upper host.Lastly,the complete process of operational data from the input to output and the opposite is implemented well to guarantee the overall availability of network nodes in the ACSS.It has great advantages of wide applicability,strong reliability and high real-time switching speed. 展开更多
关键词 RELIABILITY AMPHIBIOUS COMBAT simulation system architecture DUAL REDUNDANCY DECISION-MAKING algorithm
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Process Mining Discovery Techniques for Software Architecture Lightweight Evaluation Framework
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作者 Mahdi Sahlabadi Ravie Chandren Muniyandi +2 位作者 Zarina Shukur Faizan Qamar Syed Hussain Ali Kazmi 《Computers, Materials & Continua》 SCIE EI 2023年第3期5777-5797,共21页
This research recognizes the limitation and challenges of adaptingand applying Process Mining as a powerful tool and technique in theHypothetical Software Architecture (SA) Evaluation Framework with thefeatures and fa... This research recognizes the limitation and challenges of adaptingand applying Process Mining as a powerful tool and technique in theHypothetical Software Architecture (SA) Evaluation Framework with thefeatures and factors of lightweightness. Process mining deals with the largescalecomplexity of security and performance analysis, which are the goalsof SA evaluation frameworks. As a result of these conjectures, all ProcessMining researches in the realm of SA are thoroughly reviewed, and ninechallenges for Process Mining Adaption are recognized. Process mining isembedded in the framework and to boost the quality of the SA model forfurther analysis, the framework nominates architectural discovery algorithmsFlower, Alpha, Integer Linear Programming (ILP), Heuristic, and Inductiveand compares them vs. twelve quality criteria. Finally, the framework’s testingon three case studies approves the feasibility of applying process mining toarchitectural evaluation. The extraction of the SA model is also done by thebest model discovery algorithm, which is selected by intensive benchmarkingin this research. This research presents case studies of SA in service-oriented,Pipe and Filter, and component-based styles, modeled and simulated byHierarchical Colored Petri Net techniques based on the cases’ documentation.Processminingwithin this framework dealswith the system’s log files obtainedfrom SA simulation. Applying process mining is challenging, especially for aSA evaluation framework, as it has not been done yet. The research recognizesthe problems of process mining adaption to a hypothetical lightweightSA evaluation framework and addresses these problems during the solutiondevelopment. 展开更多
关键词 Software architecture process mining hierarchical colored petri Net architectural discovery algorithms model discovery algorithm
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Hardware Architecture for RSA Cryptography Based on Residue Number System
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作者 郭炜 刘亚灵 +2 位作者 白松辉 魏继增 孙达志 《Transactions of Tianjin University》 EI CAS 2012年第4期237-242,共6页
A parallel architecture for efficient hardware implementation of Rivest Shamir Adleman(RSA) cryptography is proposed.Residue number system(RNS) is introduced to realize high parallelism,thus all the elements under the... A parallel architecture for efficient hardware implementation of Rivest Shamir Adleman(RSA) cryptography is proposed.Residue number system(RNS) is introduced to realize high parallelism,thus all the elements under the same base are independent of each other and can be computed in parallel.Moreover,a simple and fast base transformation is used to achieve RNS Montgomery modular multiplication algorithm,which facilitates hardware implementation.Based on transport triggered architecture(TTA),the proposed architecture is designed to evaluate the performance and feasibility of the algorithm.With these optimizations,a decryption rate of 106 kbps can be achieved for 1 024-b RSA at the frequency of 100 MHz. 展开更多
关键词 residue number system RSA cryptography Montgomery algorithm computer architecture parallelalgorithm
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A UAV-Assisted V2X Network Architecture with Separated Data Transmission and Network Control
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作者 Xiao Ma Liang Wang +2 位作者 Weijia Han Xijun Wang Tingting Shang 《China Communications》 SCIE CSCD 2023年第6期260-276,共17页
With the explosive increasing number of connecting devices such as smart phones, vehicles,drones, and satellites in the wireless networks, how to manage and control such a huge number of networking nodes has become a ... With the explosive increasing number of connecting devices such as smart phones, vehicles,drones, and satellites in the wireless networks, how to manage and control such a huge number of networking nodes has become a great challenge. In this paper, we combine the advantages of centralized networks and distributed networks approaches for vehicular networks with the aid of Unmanned Aerial Vehicle(UAV), and propose a Center-controlled Multihop Wireless(CMW) networking scheme consisting of data transmission plane performed by vehicles and the network control plane implemented by the UAV.Besides, we jointly explore the advantages of Medium Access Control(MAC) protocols in the link layer and routing schemes in the network layer to facilitate the multi-hop data transmission for the ground vehicles.Particularly, the network control plane in the UAV can manage the whole network effectively via fully exploiting the acquired network topology information and traffic requests from each vehicle, and implements various kinds of control based on different traffic demands, which can enhance the networking flexibility and scalability significantly in vehicular networks.Simulation results validate the advantages of the proposed scheme compared with existing methods. 展开更多
关键词 V2X networks centralized network control network architecture UAV routing algorithm
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基于Actor-Critical架构的5G Massive MIMO波束能效的研究与应用
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作者 乔勇 葛昌帅 +1 位作者 张天兴 鲁晓峰 《通信技术》 2022年第12期1642-1649,共8页
大规模阵列天线技术(Massive Multiple Input Multiple Output,Massive MIMO)作为第五代移动通信(5G)的无线核心技术,实现了多波束空间覆盖增强,然而5G Massive MIMO的多波束射频高能耗、多波束碰撞和增加的干扰造会成5G网络能效下降,... 大规模阵列天线技术(Massive Multiple Input Multiple Output,Massive MIMO)作为第五代移动通信(5G)的无线核心技术,实现了多波束空间覆盖增强,然而5G Massive MIMO的多波束射频高能耗、多波束碰撞和增加的干扰造会成5G网络能效下降,运营成本增高。基于3D数字地图、基站工程参数、终端上报的测量报告/最小化路测(Measurement Report/Minimization of Drive Test,MR/MDT)数据、用户/业务分布构建的三维数字孪生栅格,通过卷积长短期记忆(Convolutional Long Short Term Memory,Conv-LSTM)算法对栅格内的用户分布、业务分布进行分析和预测,通过Actor-Critic架构对5G波束配置和优化策略进行评估,实现不同场景、时段的5G波束最佳能效,智能适应5G网络潮汐效应,实现“网随业动”。 展开更多
关键词 大规模阵列天线技术 数字孪生 actor-critic算法架构 波束能效
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AVirtual Cloud Storage Architecture for Enhanced Data Security
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作者 M.Antony Joans Kumar C.Christopher Columbus +1 位作者 E.Ben George T.Ajith Bosco Raj 《Computer Systems Science & Engineering》 SCIE EI 2023年第2期1735-1747,共13页
The sensitive data stored in the public cloud by privileged users,such as corporate companies and government agencies are highly vulnerable in the hands of cloud providers and hackers.The proposed Virtual Cloud Storag... The sensitive data stored in the public cloud by privileged users,such as corporate companies and government agencies are highly vulnerable in the hands of cloud providers and hackers.The proposed Virtual Cloud Storage Archi-tecture is primarily concerned with data integrity and confidentiality,as well as availability.To provide confidentiality and availability,thefile to be stored in cloud storage should be encrypted using an auto-generated key and then encoded into distinct chunks.Hashing the encoded chunks ensured thefile integrity,and a newly proposed Circular Shift Chunk Allocation technique was used to determine the order of chunk storage.Thefile could be retrieved by performing the opera-tions in reverse.Using the regenerating code,the model could regenerate the missing and corrupted chunks from the cloud.The proposed architecture adds an extra layer of security while maintaining a reasonable response time and sto-rage capacity.Experimental results analysis show that the proposed model has been tested with storage space and response time for storage and retrieval.The VCSA model consumes 1.5x(150%)storage space.It was found that total storage required for the VCSA model is very low when compared with 2x Replication and completely satisfies the CIA model.The response time VCSA model was tested with different sizedfiles starting from 2 to 16 MB.The response time for storing and retrieving a 2 MBfile is 4.96 and 3.77 s respectively,and for a 16 MBfile,the response times are 11.06 s for storage and 5.6 s for retrieval. 展开更多
关键词 Erasure code regenerating code CRYPTOGRAPHY virtual cloud storage architecture circular shift chunk allocation algorithm
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Architecture of Integrated Data Clustering Machine
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作者 ARIF Iqbal 《Computer Aided Drafting,Design and Manufacturing》 2009年第2期43-48,共6页
Data clustering is a significant information retrieval technique in today's data intensive society. Over the last few decades a vast variety of huge number of data clustering algorithms have been designed and impleme... Data clustering is a significant information retrieval technique in today's data intensive society. Over the last few decades a vast variety of huge number of data clustering algorithms have been designed and implemented for all most all data types. The quality of results of cluster analysis mainly depends on the clustering algorithm used in the analysis. Architecture of a versatile, less user dependent, dynamic and scalable data clustering machine is presented. The machine selects for analysis, the best available data clustering algorithm on the basis of the credentials of the data and previously used domain knowledge. The domain knowledge is updated on completion of each session of data analysis. 展开更多
关键词 data mining data clustering data clustering algorithms architecture FRAMEWORK
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Internet QoS: Architectures, Strategies and Mechanisms
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作者 隆克平 Cheng Shiduan Ma Jian 《High Technology Letters》 EI CAS 2001年第1期13-21,共9页
As an extensive study of Internet QoS, a framework for emerging Internet QoS strategies is presented. Integrated service (Intserv/RSVP), Differentiated service (Diffserv), MPLS, and QoS routing, are overviewed. The ke... As an extensive study of Internet QoS, a framework for emerging Internet QoS strategies is presented. Integrated service (Intserv/RSVP), Differentiated service (Diffserv), MPLS, and QoS routing, are overviewed. The key issues and relationship of these QoS architectures are discussed. Some algorithms in IP QoS implementation and unsolved problems are also studied in this paper. Furthermore, a new strategies of incorporating Intserv with Diffserv to archive end-to-end QoS is proposed. It is also discussed why MPLS and QoS routing are introduced into this framework, how they differ from and relate to other schemes and where they fit into the Diffserv architecture. The timescales of different QoS strategies are also studied and some proposals for QoS routing deployment are given. 展开更多
关键词 Internet QoS IntServ/RSVP DIFFSERV MPLS QoS routing
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QoS路由算法及其在工业物联网中的应用研究
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作者 支元 《办公自动化》 2026年第1期112-115,共4页
对QoS路由算法及其在工业物联网中的应用进行研究,具有重要的理论意义和实用价值,是当前物联网领域的研究热点之一。文章首先分析QoS路由算法原理及性能评估,其次探讨QoS路由算法在工业物联网中的适用性,分析工业物联网架构及对Qos路由... 对QoS路由算法及其在工业物联网中的应用进行研究,具有重要的理论意义和实用价值,是当前物联网领域的研究热点之一。文章首先分析QoS路由算法原理及性能评估,其次探讨QoS路由算法在工业物联网中的适用性,分析工业物联网架构及对Qos路由算法的需求,最后提出QoS路由算法在工业物联网中的应用策略,希望对推动QoS路由算法及其在工业物联网中的实际应用提供参考。 展开更多
关键词 QOS路由算法 算法性能评估 物联网架构 工业物联网 物联网应用
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面向RNS-CKKS方案的同态计算硬件加速器
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作者 陈星辰 郭家怡 +1 位作者 陈弟虎 粟涛 《计算机应用研究》 北大核心 2026年第1期208-215,共8页
针对全同态加密应用中数据存储和传输开销大、计算效率低的问题,以主流的RNS-CKKS方案为研究对象,提出了一种同态计算硬件加速器。该加速器为自同构算子设计了分治式置换网络,实现了高效无冲突的数据调度与路由。同时通过实施片内外协... 针对全同态加密应用中数据存储和传输开销大、计算效率低的问题,以主流的RNS-CKKS方案为研究对象,提出了一种同态计算硬件加速器。该加速器为自同构算子设计了分治式置换网络,实现了高效无冲突的数据调度与路由。同时通过实施片内外协同存储策略和对计算流进行重构,有效降低了硬件部署密钥切换操作的片上缓存需求并隐藏片外延迟。为进一步提升计算与资源效率,构建了统一的计算阵列并优化了片上缓存结构。在FPGA上的实验结果表明,该设计相比于OpenFHE软件函数库,实现了8.68~56.2倍的加速;相较于同类硬件加速方案,在密文-密文同态乘法上实现了1.18~1.53倍的加速以及1.10~4.98倍的面积效率提升,同时在可配置性方面具备一定优势。该工作有助于同态加密方案的硬件高效部署。 展开更多
关键词 全同态加密 RNS-CKKS算法 硬件加速器 可配置架构 现场可编程门阵列
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A hybrid discrete particle swarm optimization-genetic algorithm for multi-task scheduling problem in service oriented manufacturing systems 被引量:4
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作者 武善玉 张平 +2 位作者 李方 古锋 潘毅 《Journal of Central South University》 SCIE EI CAS CSCD 2016年第2期421-429,共9页
To cope with the task scheduling problem under multi-task and transportation consideration in large-scale service oriented manufacturing systems(SOMS), a service allocation optimization mathematical model was establis... To cope with the task scheduling problem under multi-task and transportation consideration in large-scale service oriented manufacturing systems(SOMS), a service allocation optimization mathematical model was established, and then a hybrid discrete particle swarm optimization-genetic algorithm(HDPSOGA) was proposed. In SOMS, each resource involved in the whole life cycle of a product, whether it is provided by a piece of software or a hardware device, is encapsulated into a service. So, the transportation during production of a task should be taken into account because the hard-services selected are possibly provided by various providers in different areas. In the service allocation optimization mathematical model, multi-task and transportation were considered simultaneously. In the proposed HDPSOGA algorithm, integer coding method was applied to establish the mapping between the particle location matrix and the service allocation scheme. The position updating process was performed according to the cognition part, the social part, and the previous velocity and position while introducing the crossover and mutation idea of genetic algorithm to fit the discrete space. Finally, related simulation experiments were carried out to compare with other two previous algorithms. The results indicate the effectiveness and efficiency of the proposed hybrid algorithm. 展开更多
关键词 service-oriented architecture (SOA) cyber physical systems (CPS) multi-task scheduling service allocation multi-objective optimization particle swarm algorithm
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DESIGN AND IMPLEMENTATION OF DUAL-FIELD MODULAR INVERSION ALGORITHM 被引量:1
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作者 Yang Xiaohui Yang Tongjie Dai Zibin Zhang Yongfu 《Journal of Electronics(China)》 2010年第4期531-537,共7页
Modular inverse arithmetic plays an important role in elliptic curve cryptography. Based on the analysis of Montgomery modular inversion algorithm, this paper presents a new dual-field modular inversion algorithm, and... Modular inverse arithmetic plays an important role in elliptic curve cryptography. Based on the analysis of Montgomery modular inversion algorithm, this paper presents a new dual-field modular inversion algorithm, and a novel scalable and unified architecture for Montgomery inverse hardware in finite fields GF(p) and GF(2n) is proposed. Furthermore, this architecture based on the new modular inversion algorithm has been verified by modeling it in Verilog-HDL, and accomplished it under 0.18 μm CMOS technology. The result indicates that our work has better performance and flexibility than other works. 展开更多
关键词 Modular inversion algorithm Dual field Unified architecture
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