Abstract： This work proposes a Field Programmable Gate Array （FPGA）-oriented architecture for the IEEE 802.11 Distributed Coordination Function （DCF） transceiver. We describe the functional blocks carrying out th...Abstract： This work proposes a Field Programmable Gate Array （FPGA）-oriented architecture for the IEEE 802.11 Distributed Coordination Function （DCF） transceiver. We describe the functional blocks carrying out the Carrier Sense Multiple Accesses with Collision Avoidance （CSMA/CA）, develop the interfaces to the application layer and the physical layer, and implement it on FPGA devices by utilizing Very-high-speed-integrated-circuit Hardware Description Language （VHDL）.展开更多
基金the National Natural Science Foundation of China
文摘Abstract： This work proposes a Field Programmable Gate Array （FPGA）-oriented architecture for the IEEE 802.11 Distributed Coordination Function （DCF） transceiver. We describe the functional blocks carrying out the Carrier Sense Multiple Accesses with Collision Avoidance （CSMA/CA）, develop the interfaces to the application layer and the physical layer, and implement it on FPGA devices by utilizing Very-high-speed-integrated-circuit Hardware Description Language （VHDL）.
