3D NAND中工艺结构是导致器件失效的重要因素之一,其中,选择性外延生长(SEG)的生长高度也是导致失效的一个重要参数。因此,提出了一种新的关于SEG高度引起器件失效的模型、失效概率的计算方法,并由此计算预测每百万缺陷数(DPPM)。该算...3D NAND中工艺结构是导致器件失效的重要因素之一,其中,选择性外延生长(SEG)的生长高度也是导致失效的一个重要参数。因此,提出了一种新的关于SEG高度引起器件失效的模型、失效概率的计算方法,并由此计算预测每百万缺陷数(DPPM)。该算法涉及多种数学模型如泊松分布、正态分布等,同时对3D NAND中不同层次的失效概率进行计算。根据该算法可以得到DPPM与SEG高度的关系,并对SEG高度最优值、DPPM对不同区域的SEG高度的敏感性进行了研究。展开更多
In traditional 3D NAND design,peripheral circuit accounts for 20-30%of the chip realestate,which reduces the memory density of flash memory.As 3D NAND technology stacks to 128 layers or higher,peripheral circuits may ...In traditional 3D NAND design,peripheral circuit accounts for 20-30%of the chip realestate,which reduces the memory density of flash memory.As 3D NAND technology stacks to 128 layers or higher,peripheral circuits may account for more than 50%of the overall chip area.On the contrast,the Xtacking^TM technology arranges array and logic parts on two different wafers,and connects the memory arrays to the logic circuit by metal VIAs(Vertical Interconnect Accesses)to achieve unprecedented high storage density as well as DRAM level I/O speed.As a consequence,it becomes increasingly significant to monitor metal VIAs depth before wafer bonding process as to ensure reliability of array-logic connections.Currently,AFM(Atom Force Microscopy)is the main stream method of VIA depth monitoring.Apparently,AFM wins the battle of precision,however the low throughput limited its usage in mass production.In order to accomplish the requirement of VLSI production,a WLI(White Light Interference)metrology is revisited and a novel WLI method was developed to monitor VIAs depth.Basically there are two major limitations that keep WLI tools from wider use,transparent film impact and diffraction limitation.In this work,the engineering solutions are illustrated and inline dishing measurement is achieved with high accuracy and precision.展开更多
文摘In traditional 3D NAND design,peripheral circuit accounts for 20-30%of the chip realestate,which reduces the memory density of flash memory.As 3D NAND technology stacks to 128 layers or higher,peripheral circuits may account for more than 50%of the overall chip area.On the contrast,the Xtacking^TM technology arranges array and logic parts on two different wafers,and connects the memory arrays to the logic circuit by metal VIAs(Vertical Interconnect Accesses)to achieve unprecedented high storage density as well as DRAM level I/O speed.As a consequence,it becomes increasingly significant to monitor metal VIAs depth before wafer bonding process as to ensure reliability of array-logic connections.Currently,AFM(Atom Force Microscopy)is the main stream method of VIA depth monitoring.Apparently,AFM wins the battle of precision,however the low throughput limited its usage in mass production.In order to accomplish the requirement of VLSI production,a WLI(White Light Interference)metrology is revisited and a novel WLI method was developed to monitor VIAs depth.Basically there are two major limitations that keep WLI tools from wider use,transparent film impact and diffraction limitation.In this work,the engineering solutions are illustrated and inline dishing measurement is achieved with high accuracy and precision.
