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Implementation and Evaluation of Dynamically Weighted Low Complexity Fair Queuing(DWLC-FQ) Algorithm for Packet Scheduling in WiMAX Networks 被引量:2
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作者 Zuber Patel Upena Dalal 《China Communications》 SCIE CSCD 2016年第5期128-140,共13页
Services provided by internet need guaranteed network performance. Efficient packet queuing and scheduling schemes play key role in achieving this. Internet engineering task force(IETF) has proposed Differentiated Ser... Services provided by internet need guaranteed network performance. Efficient packet queuing and scheduling schemes play key role in achieving this. Internet engineering task force(IETF) has proposed Differentiated Services(Diff Serv) architecture for IP network which is based on classifying packets in to different service classes and scheduling them. Scheduling schemes of today's wireless broadband networks work on service differentiation. In this paper, we present a novel packet queue scheduling algorithm called dynamically weighted low complexity fair queuing(DWLC-FQ) which is an improvement over weighted fair queuing(WFQ) and worstcase fair weighted fair queuing+(WF2Q+). The proposed algorithm incorporates dynamic weight adjustment mechanism to cope with dynamics of data traffic such as burst and overload. It also reduces complexity associated with virtual time update and hence makes it suitable for high speed networks. Simulation results of proposed packet scheduling scheme demonstrate improvement in delay and drop rate performance for constant bit rate and video applications with very little or negligible impact on fairness. 展开更多
关键词 fair queuing packet scheduling QoS virtual time WF2Q+ WFQ
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DESIGN AND IMPLEMENTATION OF SINGLE-BUFFERED ROUTERS
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作者 Hu Ximing Qu Jing +1 位作者 Wang Binqiang Wu Jiangxing 《Journal of Electronics(China)》 2007年第4期470-476,共7页
A Single-Buffered (SB) router is a router where only one stage of shared buffering is sandwiched between two interconnects in comparison of a Combined Input and Output Queued (CIOQ) router where a central switch f... A Single-Buffered (SB) router is a router where only one stage of shared buffering is sandwiched between two interconnects in comparison of a Combined Input and Output Queued (CIOQ) router where a central switch fabric is sandwiched between two stages of buffering. The notion of SB routers was firstly proposed by the High-Performance Networking Group (HPNG) of Stanford University, along with two promising designs of SB routers: one of which was Parallel Shared Memory (PSM) router and the other was Distributed Shared Memory (DSM) router. Admittedly, the work of HPNG deserved full credit, but all results presented by them appeared to relay on a Centralized Memory Management Algorithm (CMMA) which was essentially impractical because of the high processing and communication complexity. This paper attempts to make a scalable high-speed SB router completely practical by introducing a fully distributed architecture for managing the shared memory of SB routers. The resulting SB router is called as a Virtual Output and Input Queued (VOIQ) router. Furthermore, the scheme of VOIQ routers can not only eliminate the need for the CMMA scheduler, thus allowing a fully distributed implementation with low processing and commu- nication complexity, but also provide QoS guarantees and efficiently support variable-length packets in this paper. In particular, the results of performance testing and the hardware implementation of our VOIQ-based router (NDSC~ SR1880-TTM series) are illustrated at the end of this paper. The proposal of this paper is the first distributed scheme of how to design and implement SB routers publicized till now. 展开更多
关键词 Single-Buffered (SB) router Distributed Shared Memory (DSM) Parallel Shared Memory (PSM) virtual Output and Input Queued (VOIQ) NDSC SR1880-T^TM router
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