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Applied Research on AI Technology Empowerment in Single-Chip Microcomputer Course Teaching
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作者 Hang Xu Yao Mai 《Journal of Electronic Research and Application》 2025年第6期72-77,共6页
In recent years,the application of various advanced technologies,such as digitization and informatization,has become the primary tool for innovation in education and teaching.For traditional single-chip microcomputer ... In recent years,the application of various advanced technologies,such as digitization and informatization,has become the primary tool for innovation in education and teaching.For traditional single-chip microcomputer course teaching,it is necessary to emphasize the introduction and application of high-tech innovations in its path of innovative development.This course is a typical representative of multidisciplinary teaching,involving multiple disciplines such as electronic engineering,automation,and computer science.In response to issues faced in traditional teaching,such as rigid organization of teaching content that struggles to keep pace with technological advancements,resulting in a noticeable lag in knowledge transfer,and monotonous teaching methods that fail to precisely meet the diverse learning needs of students,analyzing the innovative applications of this course under the empowerment of AI technology holds significant practical relevance.In this regard,the study relies on AI technology empowerment to analyze the application paths for the deep integration of AI technology and single-chip microcomputer courses,constructing a new teaching model to provide references for enhancing teaching quality and stimulating students’innovative potential. 展开更多
关键词 AI technology single-chip microcomputer Course teaching Technological application
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Efficient Control of Mechatronic Systems Enabled by Generative AI for Single-Chip Microcomputers
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作者 Hang Xu Yao Mai 《Journal of Electronic Research and Application》 2025年第6期35-40,共6页
In recent years,research on industrial innovation and development has primarily focused on industrial automation and intelligent manufacturing.Within the field of integrating mechatronics and intelligent control,analy... In recent years,research on industrial innovation and development has primarily focused on industrial automation and intelligent manufacturing.Within the field of integrating mechatronics and intelligent control,analyzing the efficient control of mechatronic systems enabled by generative AI for single-chip microcomputers can further highlight the value and significance of promoting AI technology applications.This paper examines the technical characteristics of generative AI in data generation,multimodal fusion,and dynamic adaptation,proposing lightweight model deployment strategies that compress large generative models to a range compatible with single-chip microcomputers,ensuring local real-time inference capabilities.It constructs an edge intelligent control architecture,enabling generative AI to directly participate in decision-making instruction generation,forming a new working system of perception,decision-making,and execution.Additionally,it designs a collaborative optimization training mechanism that leverages federated learning to overcome single-machine data limitations and enhance model generalization performance.At the application level,an intelligent fault prediction system is developed for early identification of equipment anomalies,an adaptive parameter optimization module is constructed for dynamically adjusting control strategies,and a multi-device collaborative scheduling engine is established to optimize production processes,providing technical support for embedded intelligent control in Industry 4.0 scenarios. 展开更多
关键词 Generative AI single-chip microcomputer Mechatronic system Efficient control
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A RISC-V 32-bit microprocessor on two-dimensional semiconductor platform
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作者 Di Zhang Yang Li 《Journal of Semiconductors》 2025年第8期2-4,共3页
With the rapid development of information technology,the demand for high-performance and low-power microprocessors continues to grow.Traditional silicon-based semiconductor technologies have encountered numerous bottl... With the rapid development of information technology,the demand for high-performance and low-power microprocessors continues to grow.Traditional silicon-based semiconductor technologies have encountered numerous bottlenecks in performance enhancement,such as drain-induced barrier lowering,reduced mobility caused by interface scattering,and limited current on/off ratios. 展开更多
关键词 two dimensional semiconductor low power risc v microprocessor performance information technology reduced mobility drain induced barrier lowering
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Investigation on microprocessor based waveform control of short circuit transfer CO_2 welding 被引量:1
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作者 朱锦洪 石红信 +2 位作者 李兴霞 刘兆魁 涂益民 《China Welding》 EI CAS 2006年第4期26-29,共4页
A new kind of simple and flexible CO2 welding system was developed to carry out waveform control. The system consisted of IGBT inverter, PWM circuit and microprocessor unit ( MPU) , in which the output current of co... A new kind of simple and flexible CO2 welding system was developed to carry out waveform control. The system consisted of IGBT inverter, PWM circuit and microprocessor unit ( MPU) , in which the output current of constant current (CC) power supply could be changed according to transient physical state, and the variable down slope rate control could be used to ensure a stable welding process. The welding experiment results proved the effectiveness of this control approach. 展开更多
关键词 CO2 welding waveform control microprocessor short circuit transfer
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The MMU Implementation of Unity-1 Microprocessor 被引量:2
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作者 宋传华 Cheng +2 位作者 Xu Zhu Dexin 《High Technology Letters》 EI CAS 2003年第4期27-32,共6页
Virtual memory management is always a very essential issue of the modern microprocessor design. A memory management unit (MMU) is designed to implement a virtual machine for user programs, and provides a management me... Virtual memory management is always a very essential issue of the modern microprocessor design. A memory management unit (MMU) is designed to implement a virtual machine for user programs, and provides a management mechanism between the operating system and user programs. This paper analyzes the tradeoffs considered in the MMU design of Unity 11 CPU of Peking University, and introduces in detail the solution of pure hardware table walking with two level page table organization. The implementation takes care of required operations and high performances needed by modern operating systems and low costs needed by embedded systems. This solution has been silicon proven, and successfully porting the Linux 2.4.17 kernel, the XWindow system, GNOME and most application software onto the Unity platform. 展开更多
关键词 Unity 1 MMU TLB table walking microprocessor
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Development of single-chip fuzzy controller based on FFSI in binary 被引量:1
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作者 张吉礼 欧进萍 孙德兴 《Journal of Harbin Institute of Technology(New Series)》 EI CAS 2003年第3期269-274,共6页
Length and concise structure of fuzzy logic reasoning program and its real-time reasoning characteris-tic have their effect on the performance of a digital single-chip fuzzy controller. The control effect of a digital... Length and concise structure of fuzzy logic reasoning program and its real-time reasoning characteris-tic have their effect on the performance of a digital single-chip fuzzy controller. The control effect of a digitalfuzzy controller based on looking up fuzzy control responding table is only relative to the table and not relative tothe fuzzy control rules in the practical control process. Aiming at above problem and having combined fuzzy log-ic reasoning with digital operational characteristics of a single-chip microcomputer, functioning-fuzzy-subset in-ference (FFSI) in binary, in which triangle membership functions of error and error-in-change are all represen-ted in binary and singleton membership functions of control variable is binary too, has been introduced. The cir-cuit principle plans of a single-chip fuzzy controller have been introduced for development of its hardware, andthe primary program structure, fuzzy logic reasoning subroutine, serial communication subroutine with PC andreliability design of the fuzzy controller are all discussed in detail. The control of indoor temperature by a fuzzycontroller has been conducted using a testing-room thermodynamic system. Research results show that the FFSIin binary can exercise a concise fuzzy control in a single-chip fuzzy controller, and the fuzzy controller is there-fore reliable and possesses a high performance-price ratio. 展开更多
关键词 functioning-fuzzy-subset inference single-chip fuzzy controller testing-room thermodynamic system indoor temperature experiment
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The Automated System of Unified Templates as an Element of Trainability of Microprocessor Relay Protection Devices 被引量:1
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作者 Viktor Nikolaevich Sizykh Aleksey Vasilyevich Daneev +1 位作者 Maksim Viktorovich Vostrikov Konstantin Vladimirovich Menaker 《Journal of Applied Mathematics and Physics》 2021年第12期3045-3057,共13页
The article discusses the possibility of further modernization of the standard microprocessor relay protection of AC overhead system feeders DPA-27.5-TNF, which is operated on the Trans-Baikal Railway by creating an a... The article discusses the possibility of further modernization of the standard microprocessor relay protection of AC overhead system feeders DPA-27.5-TNF, which is operated on the Trans-Baikal Railway by creating an additional automated system of unified templates necessary for the occurrence of “trainability” elements. The templates will be formed via a separate dedicated channel for transmission, processing and storage of the necessary information, not related to the operation of the terminal, with its subsequent visualization at the workplace of the duty personnel of traction substations, together with information from the “GID” software received via another dedicated wired channel. With the help of such a base of unified preset templates, in the future, it will be possible not only to identify the specific causes of each emergency shutdown but also to reduce their number by dynamically adjusting the existing presets of the standard operation algorithm. 展开更多
关键词 Automated System microprocessor Relay Protection Devices FEEDER Traction Substation
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Gas concentration monitoring system for small and medium-sized coal mines based on gas-sensing detection and single-chip control 被引量:1
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作者 Bin Guangfu Huang Zhenyu +1 位作者 Zhu Guanghui Li Xuejun 《Engineering Sciences》 EI 2010年第4期47-51,共5页
This paper is aimed at the actual conditions of disaster caused by gas in small and medium-sized coal mines. A new gas concentration monitoring system for coal mines is developed on the basis of gas-sensing detection ... This paper is aimed at the actual conditions of disaster caused by gas in small and medium-sized coal mines. A new gas concentration monitoring system for coal mines is developed on the basis of gas-sensing detection and single-chip control. The monitoring system uses the tin oxide as the main material of N-type semiconductor gas sensors, be- cause it has good sensitive characteristics for the flammable and explosive gas ( such as methane, carbon monoxide). The QM-N5-semiconductor gas sensor is adopted to detect the output values of the resistance under the different gas con- centrations. The system, designedly, takes the AT89C51 digital chip as the core of the circuit processing hardware structure to analyze and judge the input values of the resistance, and then achieve the control and alarm for going beyond the limit of gas concentration. The gas concentration monitoring system has man), advantages including simple in struc- ture, fast response time, stable performance and low cost. Thus, it can be widely used to monitor gas concentration and provide early wamings in small and medium-sized coal mines. 展开更多
关键词 gas concentration monitoring gas-sensing detection single-chip control small and medium-sized coal
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SF VECTOR CONTROL SYSTEM WITH TWO SINGLE CHIP MICROPROCESSORS
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作者 XU Yinquan Cui Gejin (Automation and Computer Science Department) 《Journal of China Textile University(English Edition)》 EI CAS 1990年第2期73-78,共6页
This paper introduces a SF vector control system of a slip frequency controlled induction mo-tor with simple structure,fair performance and convenient operation.It is realized by two singlechip microprocessors and fed... This paper introduces a SF vector control system of a slip frequency controlled induction mo-tor with simple structure,fair performance and convenient operation.It is realized by two singlechip microprocessors and fed from SPWM-GTR inverter.The whole system is combined by twosubsystems,both of them are 8031 single chip microprocessors.The communication between themis coordinated by the full duplex serial port within the chip and ask-and-answer communicationmanner.The error-corrected means adopted has improved the operation reliability of the system.A series of experimental results on a 3 kW induction motor are given at the end of this paper. 展开更多
关键词 VECTOR control SINGLE CHIP microprocessor SPWM WAVES
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MICROPROCESSOR BASED PHASELOCKED LOOP SPEED CONTROL SYSTEM FOR AC MOTOR
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作者 金建秋 徐银泉 《Journal of China Textile University(English Edition)》 EI CAS 1991年第3期41-48,共8页
In this paper the authors present an analysis and the implementation of microprocessor-baseddigital phase-locked loop speed control system for an induction motor which is actuated by aSPWM-GTR inverter.The system is c... In this paper the authors present an analysis and the implementation of microprocessor-baseddigital phase-locked loop speed control system for an induction motor which is actuated by aSPWM-GTR inverter.The system is controlled by a 16-bit single chip microprocessor.A new type of frequency and phase detector is presented in detail,An adaptive method isadopted in speed controller.A three mode control scheme is used.These techniques are very use-ful to the improvement of the dynamic behavior of digital AC motor drive system.Experimental results show that the system is of good stability,high precision and good dynam-ic performance. 展开更多
关键词 phase-locked TECHNIQUES microprocessor CONTROL SPEED CONTROL SYSTEMS
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On-line Cache Resizing for Low-Power Microprocessors
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作者 陈黎明 邹雪城 +1 位作者 雷鑑铭 刘政林 《Journal of Southwest Jiaotong University(English Edition)》 2009年第2期113-122,共10页
We propose a novel scheme, called on-line cache resizing (OCR), to dynamically resize the cache and meet the size requirement of each application. At each periodic interval, the scheme gathers the cache hit-miss sta... We propose a novel scheme, called on-line cache resizing (OCR), to dynamically resize the cache and meet the size requirement of each application. At each periodic interval, the scheme gathers the cache hit-miss statistics at runtime using an extra tag array. These executing statistics serve as inputs to an analytical model of cache energy. The scheme uses energy as a primary metric to dynamically increase/decrease the number of active cache ways for the next interval. The scheme minimizes the active cache size to save energy with minimal performance loss. The simulation with SPEC 2000 benchmarks shows that OCR results in an average of 38.4% energy saving compared with fixed-size caches, with only 2.0% performance loss. 展开更多
关键词 Low power CACHE Cache resizing microprocessor
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A High Performance and Energy Efficient Microprocessor with a Novel Restricted Dynamically Reconfigurable Accelerator
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作者 Itaru Hida Shinya Takamaeda-Yamazaki +2 位作者 Masayuki Ikebe Masato Motomura Tetsuya Asai 《Circuits and Systems》 2017年第5期134-147,共14页
In the era of Internet of Things, the battery life of edge devices must be extended for sensing connection to the Internet. We aim to reduce the power consumption of the microprocessor embedded in such devices by usin... In the era of Internet of Things, the battery life of edge devices must be extended for sensing connection to the Internet. We aim to reduce the power consumption of the microprocessor embedded in such devices by using a novel dynamically reconfigurable accelerator. Conventional microprocessors consume a large amount of power for memory access, in registers, and for the control of the processor itself rather than computation;this decreases the energy efficiency. Dynamically reconfigurable accelerators reduce such redundant power by computing in parallel on reconfigurable switches and processing element arrays (often consisting of an arithmetic logic unit (ALU) and registers). We propose a novel dynamically reconfigurable accelerator “DYNaSTA” composed of a dynamically reconfigurable data path and static ALU arrays. The static ALU arrays process instructions in parallel without registers and improve energy efficiency. The dynamically reconfigurable data path includes registers and many switches dynamically reconfigured to resolve operand dependencies between instructions mapped on the static ALU array, and forwards appropriate operands to the static ALU array. Therefore, the DYNaSTA accelerator has more flexibility while improving the energy efficiency compared with the conventional dynamically reconfigurable accelerators. We simulated the power consumption of the proposed DYNaSTA accelerator and measured the fabricated chip. As a result, the power consumption was reduced by 69% to 86%, and the energy efficiency improved 4.5 to 13 times compared to a general RISC microprocessor. 展开更多
关键词 EMBEDDED microprocessor RECONFIGURABLE LOW-POWER ACCELERATOR Digital Circuit Architecture
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Comprehensive Automation of Microprocessor Protection Relay Terminals Operated on AC Railways
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作者 Vostrikov Maksim Viktorovich Daneev Aleksey Vasilyevich +1 位作者 Menaker Konstantin Vladimirovich Sizykh Viktor Nikolaevich 《Journal of Applied Mathematics and Physics》 2022年第2期491-503,共13页
The article discusses the possibility of a potential reduction in the number of operations of microprocessor relay protection of feeders of the contact network of AC railways TsZA-27.5-FKS (FTS) for unknown reasons. R... The article discusses the possibility of a potential reduction in the number of operations of microprocessor relay protection of feeders of the contact network of AC railways TsZA-27.5-FKS (FTS) for unknown reasons. Real statistics on the number of microprocessor relay protection operations at the Buryatskaya traction substation are presented, simulation of the real train situation (in accordance with the regime maps of the throughput capacity of the sections of the Trans-Baikal railway) was carried out in the specialized software complex “KORTES”. Based on the results of the analysis of simulation modeling, the process of forming a unified template of settings using neural network technologies is considered, which characterizes only this specific regular train situation. To protect objects in the event of pre-emergency and emergency modes of operation of the traction power supply system, a variant of changing the standard operation algorithm of the TsZA-27.5-FKS (FTS) terminal by introducing additional blocks for calculating the predictive functions of current and voltage has been proposed. 展开更多
关键词 Automated System microprocessor Relay Protection Devices FEEDER Traction Substation
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UV Wavelength Tunable Output System Controlled by Microprocessor
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作者 JIANG Wanlu ZHANG Shuqing +1 位作者 WU Zhaoxia WANG Yutian (Yanshan University, Qinhuangdao 066004, CHN ) 《Semiconductor Photonics and Technology》 CAS 1998年第2期98-103,共6页
UV wavelength auto-tuned tuned output system is realized by the difference method. Controlled by the microprocessor, output wavelength auto- tracking is achieved.Besides, equipment self-checking auto-positioning and t... UV wavelength auto-tuned tuned output system is realized by the difference method. Controlled by the microprocessor, output wavelength auto- tracking is achieved.Besides, equipment self-checking auto-positioning and temperature correct are realized,The wavelength tuned output efficiency in the experiment is better than 97 %. 展开更多
关键词 Method of Difference microprocessor Control PID Regulation Wavelength Auto-tracking
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A Single-Chip UHF RFID Reader Transceiver IC
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作者 Runxi Zhang Chunqi Shi Zongsheng Lai 《Communications and Network》 2013年第3期563-569,共7页
A single-chip UHF RFID reader transceiver IC has been implemented in 0.18 μm SiGe BiCMOS technology. The chip includes all transceiver blocks as RX/TX RF front-end, RX/TX analog baseband, frequency synthesizer and I2... A single-chip UHF RFID reader transceiver IC has been implemented in 0.18 μm SiGe BiCMOS technology. The chip includes all transceiver blocks as RX/TX RF front-end, RX/TX analog baseband, frequency synthesizer and I2C with fully-compliant China 800/900 MHz RFID draft, ISO/IEC 18000-6C protocol and ETSI 302 208-1 local regulation. The normal mode receiver in the presence of -3 dBm self-jammer achieves -75 dBm 1% PER sensitivity. The linear class-A PA integrated in transmitter has 25 dBm OP1 dB output power for CW. The fully-integrated fractional-N fre-quency synthesizer is designed based on MASH 1-1-1 sigma-delta modulator and 1.8 GHz fundamental frequency LC-VCO for lower in-band and out-of-band phase noise. The measured phase noise is up to -106 dBc/Hz@200 kHz and -131 dBc/Hz@1 MHz offset from center frequency and the integrated RMS jitter from 10 kHz to 10 MHz is less than 1.6 pS. The chip dissipates 330 mA from 3.3 V power supply when transmitting 22.4 dBm CW signal and the PAE of linear PA is up to 26%. The chip die area is 16.8 mm2. 展开更多
关键词 Integrated CIRCUIT READER TRANSCEIVER single-chip UHF RFID
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Digital Filter for Electrocardiogram Preprocessing Based on Microprocessor
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作者 WU Xian-wen WANG Feng 《Chinese Journal of Biomedical Engineering(English Edition)》 2010年第1期30-34,共5页
This paper proposes a different method to eliminate base wander and power line interference in electrocardiogram, which introduces the integer coefficient filter theory and gives the detail for designing digital filte... This paper proposes a different method to eliminate base wander and power line interference in electrocardiogram, which introduces the integer coefficient filter theory and gives the detail for designing digital filter to remove these two normal noise signals. Signal from the MIT-BIH electrocardiogram database was used to test the performance of the filter. From the test results, the performance of the digital filer is reDT good. The filter coefficient is an integer number, therefore, the filtering algorithm can be successfully implemented on the microprocessor. 展开更多
关键词 digital filter ELECTROCARDIOGRAM microprocessor noise removing MIT-BIH database
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Security Vulnerabilities in Microprocessors
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作者 Benjamin Ashby Smith Kevin Curran 《Semiconductor Science and Information Devices》 2021年第1期24-32,共9页
Microprocessors such as those found in PCs and smartphones are complex in their design and nature.In recent years,an increasing number of security vulnerabilities have been found within these microprocessors that can ... Microprocessors such as those found in PCs and smartphones are complex in their design and nature.In recent years,an increasing number of security vulnerabilities have been found within these microprocessors that can leak sensitive user data and information.This report will investigate microarchi­tecture vulnerabilities focusing on the Spectre and Meltdown exploits and will look at what they do,how they do it and,the real-world impact these vulnerabilities can cause.Additionally,there will be an introduction to the basic concepts of how several PC components operate to support this. 展开更多
关键词 microprocessors CYBERSECURITY Microarchitecture security
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基于设计加固的抗辐射高速处理器件 被引量:1
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作者 郭阳 梁斌 +1 位作者 池雅庆 陈建军 《现代应用物理》 2025年第3期158-164,共7页
抗辐射高速处理器件是航天器信息系统的算力底座、实时处理的核心,直接决定了辐照环境下系统的性能和可靠性。通过“理论-平台-产品-试验”四步走的思路,揭示了硅基CMOS器件辐照机理,构建了辐照效应模型,面向高速处理器件突破了晶体管... 抗辐射高速处理器件是航天器信息系统的算力底座、实时处理的核心,直接决定了辐照环境下系统的性能和可靠性。通过“理论-平台-产品-试验”四步走的思路,揭示了硅基CMOS器件辐照机理,构建了辐照效应模型,面向高速处理器件突破了晶体管级、电路级和系统级抗辐射设计技术,建立了多种工艺下的抗辐射设计技术平台,攻克了高速处理器件抗辐射能力地面精准测试评价难题,研制出10亿次至5000亿次运算性能的抗辐射高速处理器件,获得广泛应用。 展开更多
关键词 CMOS器件 辐照效应 设计加固 高速处理器件
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The Temperature Intelligence Control System Based on Single Chip-Microprocessor
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作者 (changchun Institute of Technology ,changchun 130012) Liu, Shurong Ding,Lujun 《微计算机信息》 2003年第7期31-32,共2页
The paper introduces a temperature control systembased on AT89C51 single-chip-microprocessor, and discussesthe principle , hardware structure, and software design of thissystem in detail.
关键词 单片机 温度智能控制系统 AT89C51 软件设计 硬件设计
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不同特征尺寸微处理器的总剂量效应实验研究
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作者 范恒 梁润成 +2 位作者 陈法国 郭荣 郑智睿 《微电子学》 北大核心 2025年第1期59-64,共6页
针对不同特征尺寸商用微处理器在总剂量效应失效模式和失效剂量方面的差异,以同一制造商180 nm、90 nm、40 nm特征尺寸的微处理器为研究对象,利用自主研制的可扩展式微处理器总剂量效应在线测试系统,对微处理器在~(60)Co辐照期间的通信... 针对不同特征尺寸商用微处理器在总剂量效应失效模式和失效剂量方面的差异,以同一制造商180 nm、90 nm、40 nm特征尺寸的微处理器为研究对象,利用自主研制的可扩展式微处理器总剂量效应在线测试系统,对微处理器在~(60)Co辐照期间的通信、数模信号转换、非易失性存储、随机访问存储、直接存储器访问、功耗电流、时钟/定时器等功能的变化情况开展了原位在线测试。实验结果表明,3种微处理器的辐照错误剂量分别为331±36.28 Gy(Si),355.5±41.51 Gy(Si)和365.28±20.15 Gy(Si),不同特征尺寸微处理器的失效模式不同,其中180 nm微处理器的辐照最敏感单元为片内非易失性存储器,90 nm和40 nm微处理器的辐照最敏感单元为器件内核。 展开更多
关键词 总剂量效应 微处理器 纳米工艺 深亚微米工艺
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