In order to protect the finished structures on the front side during deep silicon wet etching processes, the wax coating for double-sided etching process on the wafer is studied to separate the aforementioned structur...In order to protect the finished structures on the front side during deep silicon wet etching processes, the wax coating for double-sided etching process on the wafer is studied to separate the aforementioned structures from the strong aqueous bases. By way of heating and vacuumization, the air bubbles are expelled from the coating to extend the protection duration. The air pressure in the sealed chamber is 0.026 7 Pa, and the temperature of the heated wafer is 300℃. Two kinds of the wax are used, and the corresponding photos of the etched wafer and the protection times are given. In 75 ℃ 10 % KOH solution, the protection duration is more than 8 h.展开更多
This paper presents a novel anti-shock bulk silicon etching apparatus for solving a universal problem which occurs when releasing the diaphragm （e.g. SiNx）, that the diaphragm tends to be probably cracked by the imp...This paper presents a novel anti-shock bulk silicon etching apparatus for solving a universal problem which occurs when releasing the diaphragm （e.g. SiNx）, that the diaphragm tends to be probably cracked by the impact of heatinginduced bubbles, the swirling of heating-induced etchant, dithering of the hand and imbalanced etchant pressure during the wafer being taken out. Through finite element methods, the causes of the diaphragm cracking are analysed. The impact of heating-induced bubbles could be the main factor which results in the failure stress of the SiNx diaphragm and the rupture of it. In order to reduce the four potential effects on the cracking of the released diaphragm, an anti-shock hulk silicon etching apparatus is proposed for using during the last etching process of the diaphragm release. That is, the silicon wafer is first put into the regular constant temperature etching apparatus or ultrasonic plus, and when the residual bulk silicon to be etched reaches near the interface of the silicon and SiNx diaphragm, within a distance of 50-80μm （the exact value is determined by the thickness, surface area and intensity of the released diaphragm）, the wafer is taken out carefully and put into the said anti-shock silicon etching apparatus. The wafer＇s position is at the geometrical centre, also the centre of gravity of the etching vessel. An etchant outlet is built at the bottom. The wafer is etched continuously, and at the same time the etchant flows out of the vessel. Optionally, two symmetrically placed low-power heating resistors are put in the anti-shock silicon etching apparatus to quicken the etching process. The heating resistors＇ power should be low enough to avoid the swirling of the heating-induced etchant and the impact of the heating-induced bubbles on the released diaphragm. According to the experimental results, the released SiNx diaphragm thus treated is unbroken, which proves the practicality of the said anti-shock bulk silicon etching apparatus.展开更多
Silicon etching is an essential process in various applications,and a major challenge for etching process is anisotropic high aspect ratio etching characteristics.The etch profile is determined by the plasma parameter...Silicon etching is an essential process in various applications,and a major challenge for etching process is anisotropic high aspect ratio etching characteristics.The etch profile is determined by the plasma parameters and process parameters.In this study,the plasma state with each process parameters were analyzed through the optical emission spectroscopy(OES)plasma diagnostic sensor by both chemical and physical approaches.Electron temperature and electron density were additionally acquired using the corona model with OES data that provides chemical species information,and the etch profile was evaluated through scanning electron microscope measurement data.The results include changes in profile with gas ratio,bias power,and pressure.We figure out that factors like ion energy and ion angular distribution as well as chemical reaction affect the anisotropic profile.展开更多
Silicon bulk etching is an important part of micro-electro-mechanical system(MEMS) technology. In this work, a novel etching method is proposed based on the vapor from tetramethylammonium hydroxide(TMAH) solution heat...Silicon bulk etching is an important part of micro-electro-mechanical system(MEMS) technology. In this work, a novel etching method is proposed based on the vapor from tetramethylammonium hydroxide(TMAH) solution heated up to boiling point. The monocrystalline silicon wafer is positioned over the solution surface and can be anisotropically etched by the produced vapor. This etching method does not rely on the expensive vacuum equipment used in dry etching. Meanwhile, it presents several advantages like low roughness, high etching rate and high uniformity compared with the conventional wet etching methods. The etching rate and roughness can reach 2.13 μm/min and 1.02 nm, respectively. Furthermore,the diaphragm structure and Al-based pattern on the non-etched side of wafer can maintain intact without any damage during the back-cavity fabrication. Finally, an etching mechanism has been proposed to illustrate the observed experimental phenomenon. It is suggested that there is a water thin film on the etched surface during the solution evaporation. It is in this water layer that the ionization and etching reaction of TMAH proceed, facilitating the desorption of hydrogen bubble and the enhancement of molecular exchange rate. This new etching method is of great significance in the low-cost and high-quality micro-electromechanical system industrial fabrication.展开更多
Dry etching of silicon is an essential process step for the fabrication of Micro electromechancal system (MEMS). The AZ7220 positive photo-resist was used as the etching mask and silicon micro-trenches were fabricated...Dry etching of silicon is an essential process step for the fabrication of Micro electromechancal system (MEMS). The AZ7220 positive photo-resist was used as the etching mask and silicon micro-trenches were fabricated with a multiplexed indu ctively coupled plasma (ICP) etcher. The influence of resist pattern profile, an d etch condition on sidewall roughness were investigated detail. The results sho w that the sidewall roughness of micro-trench depends on profiles of photo-resis t pattern, the initial interface between the resist bottom surface and silicon s urface heavily. The relationship between roughness and process optimization para meters are presented in the paper. The roughness of the sidewall has been decrea sed to a 20-50nm with this experiment.展开更多
WHEN scanning electrochemical microscopy (SECM) with feedback mode is used to etchcertain surface, the etchant molecules generated at a microelectrode diffuse to the surface andreact therein with the surface species, ...WHEN scanning electrochemical microscopy (SECM) with feedback mode is used to etchcertain surface, the etchant molecules generated at a microelectrode diffuse to the surface andreact therein with the surface species, resulting in local etching pattern. It is noted that theetching resolution of SECM is dominantly determined by the size of the microelectrode.However, many experimental results have shown the significant influence of the lateral diffu-sion of etchant on the etching resolution. Therefore, a thin diffusion layer of the展开更多
We demonstrate a method of fabricating through micro-holes and micro-hole arrays in silicon using femtosecond laser irradiation and selective chemical etching. The micro-hole formation mechanism is identified as the c...We demonstrate a method of fabricating through micro-holes and micro-hole arrays in silicon using femtosecond laser irradiation and selective chemical etching. The micro-hole formation mechanism is identified as the chemical reaction of the femtosecond laser-induced structure change zone and hydrofluoric acid solution. The morphologies of the through micro-holes and micro-hole arrays are characterized by using scanning electronic microscopy, The effects of the pulse number on the depth and diameter of the holes are investigated. Honeycomb arrays of through micro-holes fabricated at different laser powers and pulse numbers are demonstrated.展开更多
This paper describes a new method to create nanoscale SiO2 pits or channels using single-walled carbon nanotubes （SWNTs） in an HF solution at room temperature within a few seconds. Using aligned SWNT arrays, a patte...This paper describes a new method to create nanoscale SiO2 pits or channels using single-walled carbon nanotubes （SWNTs） in an HF solution at room temperature within a few seconds. Using aligned SWNT arrays, a pattern of nanoscale SiO2 channels can be prepared. The nanoscale SiO2 patterns can also be created on the surface of three- dimensional （3D） SiO2 substrate and even the nanoscale trenches can be constructed with arbitrary shapes. A possible mechanism for this enhanced etching of SiO2 has been qualitatively analysed using defects in SWNTs, combined with H3O＋ electric double layers around SWNTs in an HF solution.展开更多
A functionalized silicon nanowire field-effect transistor （SiNW FET） was fabricated to detect single molecules in the pM range to detect disease at the early stage with a sensitive, robust, and inexpensive method wi...A functionalized silicon nanowire field-effect transistor （SiNW FET） was fabricated to detect single molecules in the pM range to detect disease at the early stage with a sensitive, robust, and inexpensive method with the ability to provide specific and reliable data. The device was designed and fabricated by indented ash trimming via shallow anisotropic etching. The approach is a simple and low-cost technique that is compatible with the current commercial semiconductor standard CMOS process without an expensive deep reactive ion etcher. Specific electric changes were observed for DNA sensing when the nanowire surface was modified with a complementary captured DNA probe and target DNA through an organic linker （--OCH2CH3） using organofunctional alkoxysilanes （3-aminopropyl） triethoxysilane （APTES）. With this surface modification, a single specific target molecule can be detected. The simplicity of the sensing domain makes it feasible to miniaturize it for the development of a cancer detection kit, facilitating its use in both clinical and non-clinical environments to allow non-expert interpretation. With its novel electric response and potential for mass commercial fabrication, this biosensor can be developed to become a portable/point of care biosensor for both field and diagnostic applications.展开更多
The present paper discusses the development of the first and second order model for predicting the chemical etching variables, namely, etching rate, surface roughness and accuracy of advanced ceramics. The first and s...The present paper discusses the development of the first and second order model for predicting the chemical etching variables, namely, etching rate, surface roughness and accuracy of advanced ceramics. The first and second order etching rate, surface roughness and accuracy equations were developed using the Response Surface Method (RSM). The etching variables included etching temperature, etching duration, solution and solution concentration. The predictive models’ analyses were supported with the aid of the statistical software package – Design Expert (DE 7). The effects of the individual etching variables and interaction between these variables were also investigated. The study showed that predictive models successfully predicted the etching rate, surface roughness and accuracy readings recorded experimentally with 95% confident interval. The results obtained from the predictive models were also compared with Multilayer Perceptron Artificial Neural Network (ANN). Chemical Etching variables predictive by ANN were in good agreement with those with those obtained by RSM. This observation indicated the potential of ANN in predicting chemical etching variables thus eliminating the need for exhaustive chemical etching in optimization.展开更多
This paper mainly describes a research of fabrication-technology of silicon magnetic-sensitive transistor (SMST) with rectangle-plank-cubic structure fabricated on silicon wafer by MEMS technique.An experiment researc...This paper mainly describes a research of fabrication-technology of silicon magnetic-sensitive transistor (SMST) with rectangle-plank-cubic structure fabricated on silicon wafer by MEMS technique.An experiment research on basic characteristic of the silicon magnetic-sensitive transistor was done.Anisotropic etching and reliable technique project were provided and applied in order to fabricate SMST with rectangle-plank-cubic construction.This means that a new kind of fabrication technology for silicon magnetic-sensitive transistor was provided.The result shows that the technique can be not only compatible with IC technology but also integrated easily,and has a wide application field.展开更多
Texturing of diamond wire cut wafers using a standard wafer etch process chemistry has always been a challenge in solar cell manufacturing industry. This is due to the change in surface morphology of diamond wire cut ...Texturing of diamond wire cut wafers using a standard wafer etch process chemistry has always been a challenge in solar cell manufacturing industry. This is due to the change in surface morphology of diamond wire cut wafers and the abundant presence of amorphous silicon content, which are introduced from wafer manufacturing industry during sawing of multi-crystalline wafers using ultra-thin diamond wires. The industry standard texturing process for multi-crystalline wafers cannot deliver a homogeneous etched silicon surface, thereby requiring an additive compound, which acts like a surfactant in the acidic etch bath to enhance the texturing quality on diamond wire cut wafers. Black silicon wafers on the other hand require completely a different process chemistry and are normally textured using a metal catalyst assisted etching technique or by plasma reactive ion etching technique. In this paper, various challenges associated with cell processing steps using diamond wire cut and black silicon wafers along with cell electrical results using each of these wafer types are discussed.展开更多
Nanostructures of silicon are gradually becoming hot candidate due to outstanding capability for trapping light and improving conversion efficiency of solar cell. In this paper, silicon nanowires（SiNWs） and silicon ...Nanostructures of silicon are gradually becoming hot candidate due to outstanding capability for trapping light and improving conversion efficiency of solar cell. In this paper, silicon nanowires（SiNWs） and silicon inverted pyramid arrays（SiIPs） were introduced on surface of Gr-Si solar cell through silver and copper-catalyzed chemical etching, respectively. The effects of SiNWs and SiIPs on carrier lifetime, optical properties and efficiency of Gr-SiNWs and Gr-SiIPs solar cells were systematically analyzed. The results show that the inverted pyramid arrays have more excellent ability for balancing antireflectance loss and surface area enlargement. The power conversion efficiency（PCE） and carrier lifetime of Gr-SiIPs devices respectively increase by 62% and 34% by comparing with that of Gr-SiNWs solar cells. Finally, the Gr-SiIPs cell with PCE of 5.63% was successfully achieved through nitric acid doping. This work proposes a new strategy to introduce the inverted pyramid arrays for improving the performance of Gr-Si solar cells.展开更多
This work reports the coating of porous silicon (PS) with LaF3 and its influence on the photoluminescence (PL) property of PS. PS samples, prepared by electrochemical etching in a solution of HF and ethanol, were coat...This work reports the coating of porous silicon (PS) with LaF3 and its influence on the photoluminescence (PL) property of PS. PS samples, prepared by electrochemical etching in a solution of HF and ethanol, were coated with e-beam evaporated-LaF3 of different thicknesses. It was observed that the thin LaF3 layer on PS led to a good enhancement of PL yield of PS. But with the increasing thickness of LaF3 layer PL intensity of PS was decreasing along with a small blue-shift. It was also observed that all the coated samples showed degradation in PL intensity with time, but annealing could recover and stabilize the degraded PL.展开更多
Mechanical properties and corrosion resistance of Si3N4 films are studied by using different experiment parameters, such as plasma enhanced chemical vapor deposition(PECVD) RF power, ratio of reaction gas, reaction pr...Mechanical properties and corrosion resistance of Si3N4 films are studied by using different experiment parameters, such as plasma enhanced chemical vapor deposition(PECVD) RF power, ratio of reaction gas, reaction pressure and working temperature. The etching process of Si3N4 is studied by inductively coupled plasma (ICP) with a gas mixture of SF6 and O2. The influence of the technique parameters, such as ICP power, DC bias, gas composition, total flow rate, on the etching selectivity of Si3N4/EPG533 which is used as a mask layer and the etching rate of Si3N4 is studied, in order to get a better etching selectivity of Si3N4/EPG533 with a faster etching rate of Si3N4. The optimized process parameters of etching Si3N4 by ICP are obtained after a series of experiments and analysis. Under the conditions of total ICP power of 250 W, DC bias of 50W, total flow rate of 40 sccm and O2 composition of 30%, the etching selectivity of 2.05 can be reached when Si3N4 etching rate is 336 nm/min.展开更多
CoFe_2O_4 ferrite nanowire arrays are fabricated in porous silicon templates. The porous silicon templates are prepared via metal-assisted chemical etching with gold（Au） nanoparticles as the catalyst. Subsequently, ...CoFe_2O_4 ferrite nanowire arrays are fabricated in porous silicon templates. The porous silicon templates are prepared via metal-assisted chemical etching with gold（Au） nanoparticles as the catalyst. Subsequently, CoFe_2O_4 ferrite nanowires are successfully synthesized into porous silicon templates by the sol–gel method. The magnetic hysteresis loop of nanowire array shows an isotropic feature of magnetic properties. The coercivity and squareness ratio（M_r/M_s） of ensemble nanowires are found to be 630 Oe（1 Oe = 79.5775 A·m^（-1） and 0.4 respectively. However, the first-order reversal curve（FORC） is adopted to reveal the probability density function of local magnetostatic properties（i.e., interwire interaction field and coercivity）. The FORC diagram shows an obvious distribution feature for interaction field and coercivity. The local coercivity with a value of about 1000 Oe is found to have the highest probability.展开更多
A conical form of nano-sized quantum cluster was formed on the surface of p-type crystalline silicon [111] wafer by anode electrochemical etching in HF-based solution.The conical surface is highly effective in absorbi...A conical form of nano-sized quantum cluster was formed on the surface of p-type crystalline silicon [111] wafer by anode electrochemical etching in HF-based solution.The conical surface is highly effective in absorbing sunlight and transporting photoelectrons to semiconductor material.These are because each cone has a graded band gap with the energy level in the range from 1.1 to 3 eV which can be considered as consisting of quantum dots in different sizes.Since the boron concentration on the surface of each cone gradually decreases from top to bottom,a continuously varying electrical field is created along the cone height.This electric field is forcing photoelectrons generated in the cone to move rapidly to the direction perpendicular to wafer surface.Hence the drift time of photoelectrons can be less than their recombination time within the thin layer close to the bottom of the cone.展开更多
This paper discusses fabrication and performance of novel circular spiral inductors on silicon. The substrate materials underneath the inductor coil are removed by wet etching process. In the fabrication process, fine...This paper discusses fabrication and performance of novel circular spiral inductors on silicon. The substrate materials underneath the inductor coil are removed by wet etching process. In the fabrication process, fine polishing of the photoresist is used to simplify the processes and ensure perfect contact between the seed layer and the top of pillars. Dry etching technique is used to remove the seed layer. The results show that Q-factor of the inductor is greatly improved by removing silicon underneath the inductor coil. The spiral inductor with line width of 50 μm has a peak Q-factor of 10 for the inductance of 2.5 nH at frequency of 1 GHz, and the resonance frequency of the inductor is about 8.5 GHz. For the inductor of conductor width 80 μm, the peak Q-factor increases to about 17 for inductance of 1.5 nH in the frequency range of 0.05 -3.00 GHz.展开更多
文摘In order to protect the finished structures on the front side during deep silicon wet etching processes, the wax coating for double-sided etching process on the wafer is studied to separate the aforementioned structures from the strong aqueous bases. By way of heating and vacuumization, the air bubbles are expelled from the coating to extend the protection duration. The air pressure in the sealed chamber is 0.026 7 Pa, and the temperature of the heated wafer is 300℃. Two kinds of the wax are used, and the corresponding photos of the etched wafer and the protection times are given. In 75 ℃ 10 % KOH solution, the protection duration is more than 8 h.
文摘This paper presents a novel anti-shock bulk silicon etching apparatus for solving a universal problem which occurs when releasing the diaphragm （e.g. SiNx）, that the diaphragm tends to be probably cracked by the impact of heatinginduced bubbles, the swirling of heating-induced etchant, dithering of the hand and imbalanced etchant pressure during the wafer being taken out. Through finite element methods, the causes of the diaphragm cracking are analysed. The impact of heating-induced bubbles could be the main factor which results in the failure stress of the SiNx diaphragm and the rupture of it. In order to reduce the four potential effects on the cracking of the released diaphragm, an anti-shock hulk silicon etching apparatus is proposed for using during the last etching process of the diaphragm release. That is, the silicon wafer is first put into the regular constant temperature etching apparatus or ultrasonic plus, and when the residual bulk silicon to be etched reaches near the interface of the silicon and SiNx diaphragm, within a distance of 50-80μm （the exact value is determined by the thickness, surface area and intensity of the released diaphragm）, the wafer is taken out carefully and put into the said anti-shock silicon etching apparatus. The wafer＇s position is at the geometrical centre, also the centre of gravity of the etching vessel. An etchant outlet is built at the bottom. The wafer is etched continuously, and at the same time the etchant flows out of the vessel. Optionally, two symmetrically placed low-power heating resistors are put in the anti-shock silicon etching apparatus to quicken the etching process. The heating resistors＇ power should be low enough to avoid the swirling of the heating-induced etchant and the impact of the heating-induced bubbles on the released diaphragm. According to the experimental results, the released SiNx diaphragm thus treated is unbroken, which proves the practicality of the said anti-shock bulk silicon etching apparatus.
基金supported by the Koran Ministry of Trade,Industry&Energy(MOTIE:GID:20006499)via KSRC(Korea Semiconductor Research Consortium)support program。
文摘Silicon etching is an essential process in various applications,and a major challenge for etching process is anisotropic high aspect ratio etching characteristics.The etch profile is determined by the plasma parameters and process parameters.In this study,the plasma state with each process parameters were analyzed through the optical emission spectroscopy(OES)plasma diagnostic sensor by both chemical and physical approaches.Electron temperature and electron density were additionally acquired using the corona model with OES data that provides chemical species information,and the etch profile was evaluated through scanning electron microscope measurement data.The results include changes in profile with gas ratio,bias power,and pressure.We figure out that factors like ion energy and ion angular distribution as well as chemical reaction affect the anisotropic profile.
基金supported by the National Natu-ral Science Foundation of China(No.51675493 and No.51975542)the National Key R&D Program of China(No.2018YFF0300605,No.2019YFF0301802,and No.2019YFB2004802)Program for the Outstanding Innovative Teams of Higher Learning Institutions of Shanxi and Shanxi"1331 Project"Key Subject Construction(1331KSC).
文摘Silicon bulk etching is an important part of micro-electro-mechanical system(MEMS) technology. In this work, a novel etching method is proposed based on the vapor from tetramethylammonium hydroxide(TMAH) solution heated up to boiling point. The monocrystalline silicon wafer is positioned over the solution surface and can be anisotropically etched by the produced vapor. This etching method does not rely on the expensive vacuum equipment used in dry etching. Meanwhile, it presents several advantages like low roughness, high etching rate and high uniformity compared with the conventional wet etching methods. The etching rate and roughness can reach 2.13 μm/min and 1.02 nm, respectively. Furthermore,the diaphragm structure and Al-based pattern on the non-etched side of wafer can maintain intact without any damage during the back-cavity fabrication. Finally, an etching mechanism has been proposed to illustrate the observed experimental phenomenon. It is suggested that there is a water thin film on the etched surface during the solution evaporation. It is in this water layer that the ionization and etching reaction of TMAH proceed, facilitating the desorption of hydrogen bubble and the enhancement of molecular exchange rate. This new etching method is of great significance in the low-cost and high-quality micro-electromechanical system industrial fabrication.
文摘Dry etching of silicon is an essential process step for the fabrication of Micro electromechancal system (MEMS). The AZ7220 positive photo-resist was used as the etching mask and silicon micro-trenches were fabricated with a multiplexed indu ctively coupled plasma (ICP) etcher. The influence of resist pattern profile, an d etch condition on sidewall roughness were investigated detail. The results sho w that the sidewall roughness of micro-trench depends on profiles of photo-resis t pattern, the initial interface between the resist bottom surface and silicon s urface heavily. The relationship between roughness and process optimization para meters are presented in the paper. The roughness of the sidewall has been decrea sed to a 20-50nm with this experiment.
文摘WHEN scanning electrochemical microscopy (SECM) with feedback mode is used to etchcertain surface, the etchant molecules generated at a microelectrode diffuse to the surface andreact therein with the surface species, resulting in local etching pattern. It is noted that theetching resolution of SECM is dominantly determined by the size of the microelectrode.However, many experimental results have shown the significant influence of the lateral diffu-sion of etchant on the etching resolution. Therefore, a thin diffusion layer of the
基金Supported by the National Basic Research Program of China under Grant No 2012CB921804the National Natural Science Foundation of China under Grant Nos 11204236 and 61308006the Collaborative Innovation Center of Suzhou Nano Science and Technology
文摘We demonstrate a method of fabricating through micro-holes and micro-hole arrays in silicon using femtosecond laser irradiation and selective chemical etching. The micro-hole formation mechanism is identified as the chemical reaction of the femtosecond laser-induced structure change zone and hydrofluoric acid solution. The morphologies of the through micro-holes and micro-hole arrays are characterized by using scanning electronic microscopy, The effects of the pulse number on the depth and diameter of the holes are investigated. Honeycomb arrays of through micro-holes fabricated at different laser powers and pulse numbers are demonstrated.
基金supported by the National Natural Science Foundation of China (Grant Nos. 90406007, 61076069, 60776053, and 10434010)the National Basic Research Program of China (Grant No. 2007CB936800)
文摘This paper describes a new method to create nanoscale SiO2 pits or channels using single-walled carbon nanotubes （SWNTs） in an HF solution at room temperature within a few seconds. Using aligned SWNT arrays, a pattern of nanoscale SiO2 channels can be prepared. The nanoscale SiO2 patterns can also be created on the surface of three- dimensional （3D） SiO2 substrate and even the nanoscale trenches can be constructed with arbitrary shapes. A possible mechanism for this enhanced etching of SiO2 has been qualitatively analysed using defects in SWNTs, combined with H3O＋ electric double layers around SWNTs in an HF solution.
文摘A functionalized silicon nanowire field-effect transistor （SiNW FET） was fabricated to detect single molecules in the pM range to detect disease at the early stage with a sensitive, robust, and inexpensive method with the ability to provide specific and reliable data. The device was designed and fabricated by indented ash trimming via shallow anisotropic etching. The approach is a simple and low-cost technique that is compatible with the current commercial semiconductor standard CMOS process without an expensive deep reactive ion etcher. Specific electric changes were observed for DNA sensing when the nanowire surface was modified with a complementary captured DNA probe and target DNA through an organic linker （--OCH2CH3） using organofunctional alkoxysilanes （3-aminopropyl） triethoxysilane （APTES）. With this surface modification, a single specific target molecule can be detected. The simplicity of the sensing domain makes it feasible to miniaturize it for the development of a cancer detection kit, facilitating its use in both clinical and non-clinical environments to allow non-expert interpretation. With its novel electric response and potential for mass commercial fabrication, this biosensor can be developed to become a portable/point of care biosensor for both field and diagnostic applications.
文摘The present paper discusses the development of the first and second order model for predicting the chemical etching variables, namely, etching rate, surface roughness and accuracy of advanced ceramics. The first and second order etching rate, surface roughness and accuracy equations were developed using the Response Surface Method (RSM). The etching variables included etching temperature, etching duration, solution and solution concentration. The predictive models’ analyses were supported with the aid of the statistical software package – Design Expert (DE 7). The effects of the individual etching variables and interaction between these variables were also investigated. The study showed that predictive models successfully predicted the etching rate, surface roughness and accuracy readings recorded experimentally with 95% confident interval. The results obtained from the predictive models were also compared with Multilayer Perceptron Artificial Neural Network (ANN). Chemical Etching variables predictive by ANN were in good agreement with those with those obtained by RSM. This observation indicated the potential of ANN in predicting chemical etching variables thus eliminating the need for exhaustive chemical etching in optimization.
文摘This paper mainly describes a research of fabrication-technology of silicon magnetic-sensitive transistor (SMST) with rectangle-plank-cubic structure fabricated on silicon wafer by MEMS technique.An experiment research on basic characteristic of the silicon magnetic-sensitive transistor was done.Anisotropic etching and reliable technique project were provided and applied in order to fabricate SMST with rectangle-plank-cubic construction.This means that a new kind of fabrication technology for silicon magnetic-sensitive transistor was provided.The result shows that the technique can be not only compatible with IC technology but also integrated easily,and has a wide application field.
文摘Texturing of diamond wire cut wafers using a standard wafer etch process chemistry has always been a challenge in solar cell manufacturing industry. This is due to the change in surface morphology of diamond wire cut wafers and the abundant presence of amorphous silicon content, which are introduced from wafer manufacturing industry during sawing of multi-crystalline wafers using ultra-thin diamond wires. The industry standard texturing process for multi-crystalline wafers cannot deliver a homogeneous etched silicon surface, thereby requiring an additive compound, which acts like a surfactant in the acidic etch bath to enhance the texturing quality on diamond wire cut wafers. Black silicon wafers on the other hand require completely a different process chemistry and are normally textured using a metal catalyst assisted etching technique or by plasma reactive ion etching technique. In this paper, various challenges associated with cell processing steps using diamond wire cut and black silicon wafers along with cell electrical results using each of these wafer types are discussed.
基金support of this work from the NSFC (Nos. 51504117, 61764009 and 51762043)Yunnan Applied Basic Research Project (No. Y0120150138)Research Fund of Yunnan Province Collaborative Innovation Center (No. 2014XTZS009)
文摘Nanostructures of silicon are gradually becoming hot candidate due to outstanding capability for trapping light and improving conversion efficiency of solar cell. In this paper, silicon nanowires（SiNWs） and silicon inverted pyramid arrays（SiIPs） were introduced on surface of Gr-Si solar cell through silver and copper-catalyzed chemical etching, respectively. The effects of SiNWs and SiIPs on carrier lifetime, optical properties and efficiency of Gr-SiNWs and Gr-SiIPs solar cells were systematically analyzed. The results show that the inverted pyramid arrays have more excellent ability for balancing antireflectance loss and surface area enlargement. The power conversion efficiency（PCE） and carrier lifetime of Gr-SiIPs devices respectively increase by 62% and 34% by comparing with that of Gr-SiNWs solar cells. Finally, the Gr-SiIPs cell with PCE of 5.63% was successfully achieved through nitric acid doping. This work proposes a new strategy to introduce the inverted pyramid arrays for improving the performance of Gr-Si solar cells.
文摘This work reports the coating of porous silicon (PS) with LaF3 and its influence on the photoluminescence (PL) property of PS. PS samples, prepared by electrochemical etching in a solution of HF and ethanol, were coated with e-beam evaporated-LaF3 of different thicknesses. It was observed that the thin LaF3 layer on PS led to a good enhancement of PL yield of PS. But with the increasing thickness of LaF3 layer PL intensity of PS was decreasing along with a small blue-shift. It was also observed that all the coated samples showed degradation in PL intensity with time, but annealing could recover and stabilize the degraded PL.
文摘Mechanical properties and corrosion resistance of Si3N4 films are studied by using different experiment parameters, such as plasma enhanced chemical vapor deposition(PECVD) RF power, ratio of reaction gas, reaction pressure and working temperature. The etching process of Si3N4 is studied by inductively coupled plasma (ICP) with a gas mixture of SF6 and O2. The influence of the technique parameters, such as ICP power, DC bias, gas composition, total flow rate, on the etching selectivity of Si3N4/EPG533 which is used as a mask layer and the etching rate of Si3N4 is studied, in order to get a better etching selectivity of Si3N4/EPG533 with a faster etching rate of Si3N4. The optimized process parameters of etching Si3N4 by ICP are obtained after a series of experiments and analysis. Under the conditions of total ICP power of 250 W, DC bias of 50W, total flow rate of 40 sccm and O2 composition of 30%, the etching selectivity of 2.05 can be reached when Si3N4 etching rate is 336 nm/min.
基金Project supported by the National Natural Science Foundation of China(Grant No.61271039)the Scientific Projects of Sichuan Province,China(Grant No.2015HH0016)the Natural Science Foundations of Zhejiang Province,China(Grant Nos.LQ12E02001 and Y107255)
文摘CoFe_2O_4 ferrite nanowire arrays are fabricated in porous silicon templates. The porous silicon templates are prepared via metal-assisted chemical etching with gold（Au） nanoparticles as the catalyst. Subsequently, CoFe_2O_4 ferrite nanowires are successfully synthesized into porous silicon templates by the sol–gel method. The magnetic hysteresis loop of nanowire array shows an isotropic feature of magnetic properties. The coercivity and squareness ratio（M_r/M_s） of ensemble nanowires are found to be 630 Oe（1 Oe = 79.5775 A·m^（-1） and 0.4 respectively. However, the first-order reversal curve（FORC） is adopted to reveal the probability density function of local magnetostatic properties（i.e., interwire interaction field and coercivity）. The FORC diagram shows an obvious distribution feature for interaction field and coercivity. The local coercivity with a value of about 1000 Oe is found to have the highest probability.
基金supported by Hanyang University’s Brain Korea 21 program
文摘A conical form of nano-sized quantum cluster was formed on the surface of p-type crystalline silicon [111] wafer by anode electrochemical etching in HF-based solution.The conical surface is highly effective in absorbing sunlight and transporting photoelectrons to semiconductor material.These are because each cone has a graded band gap with the energy level in the range from 1.1 to 3 eV which can be considered as consisting of quantum dots in different sizes.Since the boron concentration on the surface of each cone gradually decreases from top to bottom,a continuously varying electrical field is created along the cone height.This electric field is forcing photoelectrons generated in the cone to move rapidly to the direction perpendicular to wafer surface.Hence the drift time of photoelectrons can be less than their recombination time within the thin layer close to the bottom of the cone.
文摘This paper discusses fabrication and performance of novel circular spiral inductors on silicon. The substrate materials underneath the inductor coil are removed by wet etching process. In the fabrication process, fine polishing of the photoresist is used to simplify the processes and ensure perfect contact between the seed layer and the top of pillars. Dry etching technique is used to remove the seed layer. The results show that Q-factor of the inductor is greatly improved by removing silicon underneath the inductor coil. The spiral inductor with line width of 50 μm has a peak Q-factor of 10 for the inductance of 2.5 nH at frequency of 1 GHz, and the resonance frequency of the inductor is about 8.5 GHz. For the inductor of conductor width 80 μm, the peak Q-factor increases to about 17 for inductance of 1.5 nH in the frequency range of 0.05 -3.00 GHz.
