The rapid growth of distributed data-centric applications and AI workloads increases demand for low-latency,high-throughput communication,necessitating frequent and flexible updates to network routing configurations.H...The rapid growth of distributed data-centric applications and AI workloads increases demand for low-latency,high-throughput communication,necessitating frequent and flexible updates to network routing configurations.However,maintaining consistent forwarding states during these updates is challenging,particularly when rerouting multiple flows simultaneously.Existing approaches pay little attention to multi-flow update,where improper update sequences across data plane nodes may construct deadlock dependencies.Moreover,these methods typically involve excessive control-data plane interactions,incurring significant resource overhead and performance degradation.This paper presents P4LoF,an efficient loop-free update approach that enables the controller to reroute multiple flows through minimal interactions.P4LoF first utilizes a greedy-based algorithm to generate the shortest update dependency chain for the single-flow update.These chains are then dynamically merged into a dependency graph and resolved as a Shortest Common Super-sequence(SCS)problem to produce the update sequence of multi-flow update.To address deadlock dependencies in multi-flow updates,P4LoF builds a deadlock-fix forwarding model that leverages the flexible packet processing capabilities of the programmable data plane.Experimental results show that P4LoF reduces control-data plane interactions by at least 32.6%with modest overhead,while effectively guaranteeing loop-free consistency.展开更多
Kirigami,through introducing cuts into a thin sheet,can greatly improve the stretchability of structures and also generate complex patterns,showing potentials in various applications.Interestingly,even with the same c...Kirigami,through introducing cuts into a thin sheet,can greatly improve the stretchability of structures and also generate complex patterns,showing potentials in various applications.Interestingly,even with the same cutting pattern,the mechanical response of kirigami metamaterials can exhibit significant differences depending on the cutting angles in respect to the loading direction.In this work,we investigate the structural deformation of kirigami metamaterials with square domains and varied cutting angles of 0°and 45°.We further introduce a second level of cutting on the basis of the first cutting pattern.By combining experiments and finite element simulations,it is found that,compared to the commonly used 0°cuts,the two-level kirigami metamaterials with 45°cuts exhibit a unique alternating arrangement phenomenon of expanded/unexpanded states in the loading process,which also results in distinct stress–strain response.Through tuning the cutting patterns of metamaterials with 45°cuts,precise control of the rotation of the kirigami unit is realized,leading to kirigami metamaterials with encryption properties.The current work demonstrates the programmability of structural deformation in hierarchical kirigami metamaterials through controlling the local cutting modes.展开更多
Persistent flows are defined as network flows that persist over multiple time intervals and continue to exhibit activity over extended periods,which are critical for identifying long-term behaviors and subtle security...Persistent flows are defined as network flows that persist over multiple time intervals and continue to exhibit activity over extended periods,which are critical for identifying long-term behaviors and subtle security threats.Programmable switches provide line-rate packet processing to meet the requirements of high-speed network environments,yet they are fundamentally limited in computational and memory resources.Accurate and memoryefficient persistent flow detection on programmable switches is therefore essential.However,existing approaches often rely on fixed-window sketches or multiple sketches instances,which either suffer from insufficient temporal precision or incur substantial memory overhead,making them ineffective on programmable switches.To address these challenges,we propose SP-Sketch,an innovative sliding-window-based sketch that leverages a probabilistic update mechanism to emulate slot expiration without maintaining multiple sketch instances.This innovative design significantly reduces memory consumption while preserving high detection accuracy across multiple time intervals.We provide rigorous theoretical analyses of the estimation errors,deriving precise error bounds for the proposed method,and validate our approach through comprehensive implementations on both P4 hardware switches(with Intel Tofino ASIC)and software switches(i.e.,BMv2).Experimental evaluations using real-world traffic traces demonstrate that SP-Sketch outperforms traditional methods,improving accuracy by up to 20%over baseline sliding window approaches and enhancing recall by 5%compared to non-sliding alternatives.Furthermore,SP-Sketch achieves a significant reduction in memory utilization,reducing memory consumption by up to 65%compared to traditional methods,while maintaining a robust capability to accurately track persistent flow behavior over extended time periods.展开更多
Chiral metamaterials are manmade structures with extraordinary mechanical properties derived from their special geometric design instead of chemical composition.To make the mechanical deformation programmable,the non-...Chiral metamaterials are manmade structures with extraordinary mechanical properties derived from their special geometric design instead of chemical composition.To make the mechanical deformation programmable,the non-uniform rational B-spline(NURBS)curves are taken to replace the traditional ligament boundaries of the chiral structure.The Neural networks are innovatively inserted into the calculation of mechanical properties of the chiral structure instead of finite element methods to improve computational efficiency.For the problem of finding structure configuration with specified mechanical properties,such as Young’s modulus,Poisson’s ratio or deformation,an inverse design method using the Neural network-based proxy model is proposed to build the relationship between mechanical properties and geometric configuration.To satisfy some more complex deformation requirements,a non-homogeneous inverse design method is proposed and verified through simulation and experiments.Numerical and test results reveal the high computational efficiency and accuracy of the proposed method in the design of chiral metamaterials.展开更多
This paper presents the development of a thermoplastic shape memory rubber that can be programmed at human body temperature for comfortable fitting applications.We hybridized commercially available thermoplastic rubbe...This paper presents the development of a thermoplastic shape memory rubber that can be programmed at human body temperature for comfortable fitting applications.We hybridized commercially available thermoplastic rubber(TPR)used in the footwear industry with un-crosslinked polycaprolactone(PCL)to create two samples,namely TP6040 and TP7030.The shape memory behavior,elasticity,and thermo-mechanical response of these rubbers were systematically investigated.The experimental results demonstrated outstanding shape memory performance,with both samples achieving shape fixity ratios(Rf)and shape recovery ratios(R_(r))exceeding 94%.TP6040 exhibited a fitting time of 80 s at body temperature(37℃),indicating a rapid response for shape fixing.The materials also showed good elasticity before and after programming,which is crucial for comfort fitting.These findings suggest that the developed shape memory thermoplastic rubber has potential applications in personalized comfort fitting products,offering advantages over traditional customization techniques in terms of efficiency and cost-effectiveness.展开更多
Advanced programmable metamaterials with heterogeneous microstructures have become increasingly prevalent in scientific and engineering disciplines attributed to their tunable properties.However,exploring the structur...Advanced programmable metamaterials with heterogeneous microstructures have become increasingly prevalent in scientific and engineering disciplines attributed to their tunable properties.However,exploring the structure-property relationship in these materials,including forward prediction and inverse design,presents substantial challenges.The inhomogeneous microstructures significantly complicate traditional analytical or simulation-based approaches.Here,we establish a novel framework that integrates the machine learning(ML)-encoded multiscale computational method for forward prediction and Bayesian optimization for inverse design.Unlike prior end-to-end ML methods limited to specific problems,our framework is both load-independent and geometry-independent.This means that a single training session for a constitutive model suffices to tackle various problems directly,eliminating the need for repeated data collection or training.We demonstrate the efficacy and efficiency of this framework using metamaterials with designable elliptical holes or lattice honeycombs microstructures.Leveraging accelerated forward prediction,we can precisely customize the stiffness and shape of metamaterials under diverse loading scenarios,and extend this capability to multi-objective customization seamlessly.Moreover,we achieve topology optimization for stress alleviation at the crack tip,resulting in a significant reduction of Mises stress by up to 41.2%and yielding a theoretical interpretable pattern.This framework offers a general,efficient and precise tool for analyzing the structure-property relationships of novel metamaterials.展开更多
A programmable low-profile array antenna based on nematic liquid crystals(NLCs)is proposed.Each antenna unit comprises a square patch radiating structure and a tunable NLC-based phase shifter capable of achieving a ph...A programmable low-profile array antenna based on nematic liquid crystals(NLCs)is proposed.Each antenna unit comprises a square patch radiating structure and a tunable NLC-based phase shifter capable of achieving a phase shift exceeding 360°with high linearity.First,the above 64 antenna units are periodically arranged into an 8×8 NLC-based antenna array,and the bias voltage of the NLC-based phase shifter loaded on the antenna unit is adjusted through the control of the field-programmable gate array(FPGA)programming sequences.This configuration enables precise phase changes for all 64 channels.Numerical simulation,sample processing,and experimental measurements of the antenna array are conducted to validate the performance of the antenna.The numerical and experimental results demonstrate that the proposed antenna performs well within the frequency range of 19.5-20.5 GHz,with a 3 dB relative bandwidth of 10%and a maximum main lobe gain of 14.1 dBi.A maximum scanning angle of±34°is achieved through the adjustment of the FPGA programming sequence.This NLC-based programmable array antenna shows promising potential for applications in satellite communication.展开更多
A programmable multi-modulus frequency divider is designed and implemented in a 0. 35μm CMOS process. The multi-modulus frequency divider is a single chip with two dividers in series,which are divided by 4 or 5 presc...A programmable multi-modulus frequency divider is designed and implemented in a 0. 35μm CMOS process. The multi-modulus frequency divider is a single chip with two dividers in series,which are divided by 4 or 5 prescaler and by 128-255 multi-modulus frequency divider. In the circuit design, power and speed trade-offs are analyzed for the prescaler, and power optimization techniques are used according to the input frequency of each divider cell for the 128-255 multimodulus frequency divider. The chip is designed with ESD protected I/O PAD. The dividers chain can work as high as 2.4GHz with a single ended input signal and beyond 2.6GHz with differential input signals. The dual-modulus prescaler consumes 11mA of current while the 128-255 multi-modulus frequency divider consumes 17mA of current with a 3.3V power supply. The core area of the die without PAD is 0.65mm × 0.3mm. This programmable multi-modulus frequency divider can be used for 2.4GHz ISM band PLL-based frequency synthesizers. To our knowledge, this is the first reported multi-modulus frequency divider with this structure in China.展开更多
The implementation of a programmable frequency divider, which is one of the components of the phase-locked loop （PLL） frequency synthesizer for digital video broadcastingterrestrial （DVB-T） and other modem communi...The implementation of a programmable frequency divider, which is one of the components of the phase-locked loop （PLL） frequency synthesizer for digital video broadcastingterrestrial （DVB-T） and other modem communication systems, is presented. By cooperating with a dual-modulus prescaler, this divider can realize an integer frequency division from 926 to 1 387. Besides the traditional standard cell design flow, such as logic synthesis, placement and routing, the interactions between front-end and back-end are also considered to optimize the design flow under deep submicron technology. By back-annotating the back-end information to front-end design, a custom wire-load model is created which is more practical compared with the default model. This divider has been fabricated in TSMC 0. 18μm CMOS technology using Artisan standard cell library. The chip area is 675 μm × 475 μm and the power consumption is about 2 mW under a 1.8 V power supply. Measurement results show that it works correctly and can realize a frequency division with high precision.展开更多
A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0....A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0. 35μm mixed-signal technology. Measurements demonstrate that the temperature coefficient is ± 36. 3ppm/℃ from 0 to 100℃ when the VID inputs are 11110.As the supply voltage is varied from 2.7 to 5V, the voltage reference varies by about 5mV. The maximum glitch of the transient response is about 20mV at 125kHz. Depending on the state of the five VID inputs,an output voltage between 1.1 and 1.85V is programmed in increments of 25mV.展开更多
In many communication and signal routing applications, it is desirable to have a programmable analog filter. According to this practical demand, we consider the titanium oxide memristor, which is a kind of nano-scale ...In many communication and signal routing applications, it is desirable to have a programmable analog filter. According to this practical demand, we consider the titanium oxide memristor, which is a kind of nano-scale electron device with low power dissipation and nonvolatile memory. Such characteristics could be suitable for designing the desired filter. However, both the non-analytical relation between the memristance and the charges that pass through it, and the changeable V-I characteristics in physical tests make it difficult to accurately set the memristance to the target value. In this paper, the conductive mechanism of the memristor is analyzed, a method of continuously programming the memristance is proposed and simulated in a simulation program with integrated circuit emphasis, and its feasibility and compatibility, both in simu- lations and physical realizations, are demonstrated. This method is then utilized in a first-order active filter as an example to show its applications in programmable filters. This work also provides a practical tool for utilizing memristors as resistance programmable devices.展开更多
A novel programmable gain amplifier（ PGA） based on a signal-summing topology is proposed. Different from conventional signal-summing variable gain amplifiers（ VGA）,a binary-weighted switching technique is employed...A novel programmable gain amplifier（ PGA） based on a signal-summing topology is proposed. Different from conventional signal-summing variable gain amplifiers（ VGA）,a binary-weighted switching technique is employed to vary the current-steering transistors＇ aspect ratio to change their transconductance, and hence, an accurate gain step size of 6dB is achieved. The constant-g_m biasing technique and the matching of the transistors and resistors ensures that the gain of the proposed topology is independent of the variation of process, voltage and temperature（ PVT）. P-well NMOS（ Nmetal oxide semiconductor） transistors are utilized to eliminate the influence of back-gate effect which will induce gain error.The source-degeneration technique ensures good linearity performance at a low gain. The proposed PGA is fabricated in a0.18 μm CMOS（ complementary metal oxide semiconductor）process. The measurement results show a variable gain ranging from 0 to24 dB with a step size of 6 dB and a maximum gain error of 0. 3dB. A constant 3dB bandwidth of 210 MHz is achieved at different gain settings. The measured output 3rd intercept point（OIP3） and minimum noise figure（ NF） are20. 9 dBm and 11.1 dB, respectively. The whole PGA has a compact layout of 0.068 mm^2. The total power consumption is4. 8 mW under a 1. 8 V supply voltage.展开更多
The modelling, design and implementation of a high-speed programmable polyphase finite impulse response (FIR) filter with field programmable gate array (FPGA) technology are described. This FIR filter can run automati...The modelling, design and implementation of a high-speed programmable polyphase finite impulse response (FIR) filter with field programmable gate array (FPGA) technology are described. This FIR filter can run automatically according to the programmable configuration word including symmetry/asymmetry, odd/even taps, from 32 taps up to 256 taps. The filter with 12 bit signal and 12 bit coefficient word-length has been realized on a Xilinx VirtexⅡ-v1500 device and operates at the maximum sampling frequency of (160 MHz.)展开更多
Chip-scale programmable optical signal processors are often used to flexibly manipulate the optical signals for satisfying the demands in various applications,such as lidar,radar,and artificial intelligence.Silicon ph...Chip-scale programmable optical signal processors are often used to flexibly manipulate the optical signals for satisfying the demands in various applications,such as lidar,radar,and artificial intelligence.Silicon photonics has unique advantages of ultra-high integration density as well as CMOS compatibility,and thus makes it possible to develop large-scale programmable optical signal processors.The challenge is the high silicon waveguides propagation losses and the high calibration complexity for all tuning elements due to the random phase errors.In this paper,we propose and demonstrate a programmable silicon photonic processor for the first time by introducing low-loss multimode photonic waveguide spirals and low-random-phase-error Mach-Zehnder switches.The present chip-scale programmable silicon photonic processor comprises a 1×4 variable power splitter based on cascaded Mach-Zehnder couplers(MZCs),four Ge/Si photodetectors,four channels of thermally-tunable optical delaylines.Each channel consists of a continuously-tuning phase shifter based on a waveguide spiral with a micro-heater and a digitally-tuning delayline realized with cascaded waveguide-spiral delaylines and MZSs for 5.68 ps time-delay step.Particularly,these waveguide spirals used here are designed to be as wide as 2μm,enabling an ultralow propagation loss of 0.28 dB/cm.Meanwhile,these MZCs and MZSs are designed with 2-μm-wide arm waveguides,and thus the random phase errors in the MZC/MZS arms are negligible,in which case the calibration for these MZSs/MZCs becomes easy and furthermore the power consumption for compensating the phase errors can be reduced greatly.Finally,this programmable silicon photonic processor is demonstrated successfully to verify a number of distinctively different functionalities,including tunable time-delay,microwave photonic beamforming,arbitrary optical signal filtering,and arbitrary waveform generation.展开更多
The design of a programmable frequency divider, which is one of the components of the phase-locked loop （PLL） frequency synthesizer for transmitter and receiver in IEEE 802. 11 a standard, is investigated. The main ...The design of a programmable frequency divider, which is one of the components of the phase-locked loop （PLL） frequency synthesizer for transmitter and receiver in IEEE 802. 11 a standard, is investigated. The main steps in very large-scale integration （VLSI） design flow such as logic synthesis, floorplan and placement ＆ routing （P ＆ R） are introduced. By back-annotating the back-end information to the front-end design, the custom wire-load model is created and used for optimizing the design flow under deep submicron technology. The programmable frequency divider is implemented based on Artisan TSMC （Taiwan Semicoductor Manufacturing Co. Ltd. ）0. 18μm CMOS （complementary metal-oxide-semiconductor） standard cells and fabricated. The Chip area is 1 360. 5μm^2 and can work in the range of 100 to 200 MHz. The measurement results indicate that the design conforms to the frequency division precision.展开更多
Communication-dependent and software-based distributed energy resources(DERs)are extensively integrated into modern microgrids,providing extensive benefits such as increased distributed controllability,scalability,and...Communication-dependent and software-based distributed energy resources(DERs)are extensively integrated into modern microgrids,providing extensive benefits such as increased distributed controllability,scalability,and observability.However,malicious cyber-attackers can exploit various potential vulnerabilities.In this study,a programmable adaptive security scanning(PASS)approach is presented to protect DER inverters against various power-bot attacks.Specifically,three different types of attacks,namely controller manipulation,replay,and injection attacks,are considered.This approach employs both software-defined networking technique and a novel coordinated detection method capable of enabling programmable and scalable networked microgrids(NMs)in an ultra-resilient,time-saving,and autonomous manner.The coordinated detection method efficiently identifies the location and type of power-bot attacks without disrupting normal NM operations.Extensive simulation results validate the efficacy and practicality of the PASS for securing NMs.展开更多
Synergistic chemotherapy-photothermal therapy(CT-PTT)can improve the cancer treatment efficacy,but its treatment effect is still limited by factors such as targeting efficiency and treatment sequence.Herein,a H_(2)S-r...Synergistic chemotherapy-photothermal therapy(CT-PTT)can improve the cancer treatment efficacy,but its treatment effect is still limited by factors such as targeting efficiency and treatment sequence.Herein,a H_(2)S-responsive metal organic frameworks(MOFs)coated rare-earth nanocomposite(csEr@-MOF)was constructed and loaded with a chemotherapeutic drug(DOX)and a heat shock protein(HSP)inhibitor(Shepherdin).As the drug-loaded csEr@MOF reaches the H_(2)S-riched colorectal tumor region,based on the reaction between H_(2)S and MOF,Shepherdin is released for inhibiting the function of HSPs,the generated CuS is used for PTT and DOX is released for CT.Through being monitored by ratiometric imaging of rare-earth nanocomposite,it is possible to perform the precise treatment timing for PTT.With the help of Shepherdin,the treatment effect of PTT was enhanced.Therefore,programmable CT-PTT synergistic cancer therapy activated by a single H_(2)S trigger is achieved in vitro and in vivo.This work provides new ideas for designing tumor microenvironment-responsive therapeutic agents for programmable synergistic therapy with better targeting and therapeutic efficiency.展开更多
In order to obtain variable characteristics,the digital filter's type,number of taps and coefficients should be changed constantly such that the desired frequency-domain characteristics can be obtained.This paper ...In order to obtain variable characteristics,the digital filter's type,number of taps and coefficients should be changed constantly such that the desired frequency-domain characteristics can be obtained.This paper proposes a method for self-programmable variable digital filter(VDF) design based on field programmable gate array(FPGA).We implement a digital filter system by using custom embedded micro-processor,programmable finite impulse response(P-FIR) macro module,coefficient-loader,clock manager and analog/digital(A/D) or digital/analog(D/A) controller and other modules.The self-programmable VDF can provide the best solution for realization of digital filter algorithms,which are the low-pass,high-pass,band-pass and band-stop filter algorithms with variable frequency domain characteristics.The design examples with minimum 1 to maximum 32 taps FIR filter,based on Modelsim post-routed simulation and onboard running on XUPV5-LX110T,are provided to demonstrate the effectiveness of the proposed method.展开更多
In current wireless communication and electronic systems,digital signals and electromagnetic(EM)radiation are processed by different modules.Here,we propose a mechanism to fuse the modulation of digital signals and th...In current wireless communication and electronic systems,digital signals and electromagnetic(EM)radiation are processed by different modules.Here,we propose a mechanism to fuse the modulation of digital signals and the manipulation of EM radiation on a single programmable metasurface(PM).The PM consists of massive subwavelength-scale digital coding elements.A set of digital states of all elements forms simultaneous digital information roles for modulation and the wave-control sequence code of the PM.By designing digital coding sequences in the spatial and temporal domains,the digital information and farfield patterns of the PM can be programmed simultaneously and instantly in desired ways.For the experimental demonstration of the mechanism,we present a programmable wireless communication system.The same system can realize transmissions of digital information in single-channel modes with beamsteerable capability and multichannel modes with multiple independent information.The measured results show the excellent performance of the programmable system.This work provides excellent prospects for applications in fifth-or sixth-generation wireless communications and modern intelligent platforms for unmanned aircrafts and vehicles.展开更多
基金supported by the National Key Research and Development Program of China under Grant 2022YFB2901501in part by the Science and Technology Innovation leading Talents Subsidy Project of Central Plains under Grant 244200510038.
文摘The rapid growth of distributed data-centric applications and AI workloads increases demand for low-latency,high-throughput communication,necessitating frequent and flexible updates to network routing configurations.However,maintaining consistent forwarding states during these updates is challenging,particularly when rerouting multiple flows simultaneously.Existing approaches pay little attention to multi-flow update,where improper update sequences across data plane nodes may construct deadlock dependencies.Moreover,these methods typically involve excessive control-data plane interactions,incurring significant resource overhead and performance degradation.This paper presents P4LoF,an efficient loop-free update approach that enables the controller to reroute multiple flows through minimal interactions.P4LoF first utilizes a greedy-based algorithm to generate the shortest update dependency chain for the single-flow update.These chains are then dynamically merged into a dependency graph and resolved as a Shortest Common Super-sequence(SCS)problem to produce the update sequence of multi-flow update.To address deadlock dependencies in multi-flow updates,P4LoF builds a deadlock-fix forwarding model that leverages the flexible packet processing capabilities of the programmable data plane.Experimental results show that P4LoF reduces control-data plane interactions by at least 32.6%with modest overhead,while effectively guaranteeing loop-free consistency.
基金supported by the National Natural Science Foundation of China(Grant Nos.12102392 and 12272341)the Zhejiang Provincial Natural Science Foundation of China(Grant No.LQ21A020008).
文摘Kirigami,through introducing cuts into a thin sheet,can greatly improve the stretchability of structures and also generate complex patterns,showing potentials in various applications.Interestingly,even with the same cutting pattern,the mechanical response of kirigami metamaterials can exhibit significant differences depending on the cutting angles in respect to the loading direction.In this work,we investigate the structural deformation of kirigami metamaterials with square domains and varied cutting angles of 0°and 45°.We further introduce a second level of cutting on the basis of the first cutting pattern.By combining experiments and finite element simulations,it is found that,compared to the commonly used 0°cuts,the two-level kirigami metamaterials with 45°cuts exhibit a unique alternating arrangement phenomenon of expanded/unexpanded states in the loading process,which also results in distinct stress–strain response.Through tuning the cutting patterns of metamaterials with 45°cuts,precise control of the rotation of the kirigami unit is realized,leading to kirigami metamaterials with encryption properties.The current work demonstrates the programmability of structural deformation in hierarchical kirigami metamaterials through controlling the local cutting modes.
基金supported by the National Undergraduate Innovation and Entrepreneurship Training Program of China(Project No.202510559076)at Jinan University,a nationwide initiative administered by the Ministry of Educationthe National Natural Science Foundation of China(NSFC)under Grant No.62172189.
文摘Persistent flows are defined as network flows that persist over multiple time intervals and continue to exhibit activity over extended periods,which are critical for identifying long-term behaviors and subtle security threats.Programmable switches provide line-rate packet processing to meet the requirements of high-speed network environments,yet they are fundamentally limited in computational and memory resources.Accurate and memoryefficient persistent flow detection on programmable switches is therefore essential.However,existing approaches often rely on fixed-window sketches or multiple sketches instances,which either suffer from insufficient temporal precision or incur substantial memory overhead,making them ineffective on programmable switches.To address these challenges,we propose SP-Sketch,an innovative sliding-window-based sketch that leverages a probabilistic update mechanism to emulate slot expiration without maintaining multiple sketch instances.This innovative design significantly reduces memory consumption while preserving high detection accuracy across multiple time intervals.We provide rigorous theoretical analyses of the estimation errors,deriving precise error bounds for the proposed method,and validate our approach through comprehensive implementations on both P4 hardware switches(with Intel Tofino ASIC)and software switches(i.e.,BMv2).Experimental evaluations using real-world traffic traces demonstrate that SP-Sketch outperforms traditional methods,improving accuracy by up to 20%over baseline sliding window approaches and enhancing recall by 5%compared to non-sliding alternatives.Furthermore,SP-Sketch achieves a significant reduction in memory utilization,reducing memory consumption by up to 65%compared to traditional methods,while maintaining a robust capability to accurately track persistent flow behavior over extended time periods.
基金supported by the National Natural Science Foundation of China(grant numbers 11972287 and 12072266)the State Key Laboratory of Structural Analysis,Optimization and CAE Software for Industrial Equipment(GZ23106)+1 种基金the National Key Laboratory of Aircraft Configuration Design(No.2023-JCJQ-LB-070)the Fundamental Research Funds for the Central Universities.
文摘Chiral metamaterials are manmade structures with extraordinary mechanical properties derived from their special geometric design instead of chemical composition.To make the mechanical deformation programmable,the non-uniform rational B-spline(NURBS)curves are taken to replace the traditional ligament boundaries of the chiral structure.The Neural networks are innovatively inserted into the calculation of mechanical properties of the chiral structure instead of finite element methods to improve computational efficiency.For the problem of finding structure configuration with specified mechanical properties,such as Young’s modulus,Poisson’s ratio or deformation,an inverse design method using the Neural network-based proxy model is proposed to build the relationship between mechanical properties and geometric configuration.To satisfy some more complex deformation requirements,a non-homogeneous inverse design method is proposed and verified through simulation and experiments.Numerical and test results reveal the high computational efficiency and accuracy of the proposed method in the design of chiral metamaterials.
基金supported by the Aeronautical Science Foundation of China(Grant Nos.2024Z009052003,20230038052001 and 20230015052002)the Third Batch of Science and Technology Plan Projects in Changzhou City in 2023(Applied Basic Research,Grant No.CJ20230080).
文摘This paper presents the development of a thermoplastic shape memory rubber that can be programmed at human body temperature for comfortable fitting applications.We hybridized commercially available thermoplastic rubber(TPR)used in the footwear industry with un-crosslinked polycaprolactone(PCL)to create two samples,namely TP6040 and TP7030.The shape memory behavior,elasticity,and thermo-mechanical response of these rubbers were systematically investigated.The experimental results demonstrated outstanding shape memory performance,with both samples achieving shape fixity ratios(Rf)and shape recovery ratios(R_(r))exceeding 94%.TP6040 exhibited a fitting time of 80 s at body temperature(37℃),indicating a rapid response for shape fixing.The materials also showed good elasticity before and after programming,which is crucial for comfort fitting.These findings suggest that the developed shape memory thermoplastic rubber has potential applications in personalized comfort fitting products,offering advantages over traditional customization techniques in terms of efficiency and cost-effectiveness.
基金supported by the National Natural Science Foundation of China (Grant Nos.12102021,12372105,12172026,and 12225201)the Fundamental Research Funds for the Central Universities and the Academic Excellence Foundation of BUAA for PhD Students.
文摘Advanced programmable metamaterials with heterogeneous microstructures have become increasingly prevalent in scientific and engineering disciplines attributed to their tunable properties.However,exploring the structure-property relationship in these materials,including forward prediction and inverse design,presents substantial challenges.The inhomogeneous microstructures significantly complicate traditional analytical or simulation-based approaches.Here,we establish a novel framework that integrates the machine learning(ML)-encoded multiscale computational method for forward prediction and Bayesian optimization for inverse design.Unlike prior end-to-end ML methods limited to specific problems,our framework is both load-independent and geometry-independent.This means that a single training session for a constitutive model suffices to tackle various problems directly,eliminating the need for repeated data collection or training.We demonstrate the efficacy and efficiency of this framework using metamaterials with designable elliptical holes or lattice honeycombs microstructures.Leveraging accelerated forward prediction,we can precisely customize the stiffness and shape of metamaterials under diverse loading scenarios,and extend this capability to multi-objective customization seamlessly.Moreover,we achieve topology optimization for stress alleviation at the crack tip,resulting in a significant reduction of Mises stress by up to 41.2%and yielding a theoretical interpretable pattern.This framework offers a general,efficient and precise tool for analyzing the structure-property relationships of novel metamaterials.
基金The National Natural Science Foundation of China(No.62401168,62401139,62401170)China Postdoctoral Science Foundation(No.2023MD744197)+2 种基金Postdoctoral Fellowship Program of CPSF(No.GZC20230631)Project for Enhancing Young and Middle-aged Teacher’s Research Basis Ability in Colleges of Guangxi(No.2023KY0218)Guangxi Key Laboratory Foundation of Optoelectronic Information Processing(No.GD23102)。
文摘A programmable low-profile array antenna based on nematic liquid crystals(NLCs)is proposed.Each antenna unit comprises a square patch radiating structure and a tunable NLC-based phase shifter capable of achieving a phase shift exceeding 360°with high linearity.First,the above 64 antenna units are periodically arranged into an 8×8 NLC-based antenna array,and the bias voltage of the NLC-based phase shifter loaded on the antenna unit is adjusted through the control of the field-programmable gate array(FPGA)programming sequences.This configuration enables precise phase changes for all 64 channels.Numerical simulation,sample processing,and experimental measurements of the antenna array are conducted to validate the performance of the antenna.The numerical and experimental results demonstrate that the proposed antenna performs well within the frequency range of 19.5-20.5 GHz,with a 3 dB relative bandwidth of 10%and a maximum main lobe gain of 14.1 dBi.A maximum scanning angle of±34°is achieved through the adjustment of the FPGA programming sequence.This NLC-based programmable array antenna shows promising potential for applications in satellite communication.
文摘A programmable multi-modulus frequency divider is designed and implemented in a 0. 35μm CMOS process. The multi-modulus frequency divider is a single chip with two dividers in series,which are divided by 4 or 5 prescaler and by 128-255 multi-modulus frequency divider. In the circuit design, power and speed trade-offs are analyzed for the prescaler, and power optimization techniques are used according to the input frequency of each divider cell for the 128-255 multimodulus frequency divider. The chip is designed with ESD protected I/O PAD. The dividers chain can work as high as 2.4GHz with a single ended input signal and beyond 2.6GHz with differential input signals. The dual-modulus prescaler consumes 11mA of current while the 128-255 multi-modulus frequency divider consumes 17mA of current with a 3.3V power supply. The core area of the die without PAD is 0.65mm × 0.3mm. This programmable multi-modulus frequency divider can be used for 2.4GHz ISM band PLL-based frequency synthesizers. To our knowledge, this is the first reported multi-modulus frequency divider with this structure in China.
基金The National Natural Science Foundation of China(No.60472057)
文摘The implementation of a programmable frequency divider, which is one of the components of the phase-locked loop （PLL） frequency synthesizer for digital video broadcastingterrestrial （DVB-T） and other modem communication systems, is presented. By cooperating with a dual-modulus prescaler, this divider can realize an integer frequency division from 926 to 1 387. Besides the traditional standard cell design flow, such as logic synthesis, placement and routing, the interactions between front-end and back-end are also considered to optimize the design flow under deep submicron technology. By back-annotating the back-end information to front-end design, a custom wire-load model is created which is more practical compared with the default model. This divider has been fabricated in TSMC 0. 18μm CMOS technology using Artisan standard cell library. The chip area is 675 μm × 475 μm and the power consumption is about 2 mW under a 1.8 V power supply. Measurement results show that it works correctly and can realize a frequency division with high precision.
文摘A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0. 35μm mixed-signal technology. Measurements demonstrate that the temperature coefficient is ± 36. 3ppm/℃ from 0 to 100℃ when the VID inputs are 11110.As the supply voltage is varied from 2.7 to 5V, the voltage reference varies by about 5mV. The maximum glitch of the transient response is about 20mV at 125kHz. Depending on the state of the five VID inputs,an output voltage between 1.1 and 1.85V is programmed in increments of 25mV.
基金supported by the National Natural Science Foundation of China(Grant Nos.61171017 and F010505)
文摘In many communication and signal routing applications, it is desirable to have a programmable analog filter. According to this practical demand, we consider the titanium oxide memristor, which is a kind of nano-scale electron device with low power dissipation and nonvolatile memory. Such characteristics could be suitable for designing the desired filter. However, both the non-analytical relation between the memristance and the charges that pass through it, and the changeable V-I characteristics in physical tests make it difficult to accurately set the memristance to the target value. In this paper, the conductive mechanism of the memristor is analyzed, a method of continuously programming the memristance is proposed and simulated in a simulation program with integrated circuit emphasis, and its feasibility and compatibility, both in simu- lations and physical realizations, are demonstrated. This method is then utilized in a first-order active filter as an example to show its applications in programmable filters. This work also provides a practical tool for utilizing memristors as resistance programmable devices.
基金The National Natural Science Foundation of China(No.61306069)
文摘A novel programmable gain amplifier（ PGA） based on a signal-summing topology is proposed. Different from conventional signal-summing variable gain amplifiers（ VGA）,a binary-weighted switching technique is employed to vary the current-steering transistors＇ aspect ratio to change their transconductance, and hence, an accurate gain step size of 6dB is achieved. The constant-g_m biasing technique and the matching of the transistors and resistors ensures that the gain of the proposed topology is independent of the variation of process, voltage and temperature（ PVT）. P-well NMOS（ Nmetal oxide semiconductor） transistors are utilized to eliminate the influence of back-gate effect which will induce gain error.The source-degeneration technique ensures good linearity performance at a low gain. The proposed PGA is fabricated in a0.18 μm CMOS（ complementary metal oxide semiconductor）process. The measurement results show a variable gain ranging from 0 to24 dB with a step size of 6 dB and a maximum gain error of 0. 3dB. A constant 3dB bandwidth of 210 MHz is achieved at different gain settings. The measured output 3rd intercept point（OIP3） and minimum noise figure（ NF） are20. 9 dBm and 11.1 dB, respectively. The whole PGA has a compact layout of 0.068 mm^2. The total power consumption is4. 8 mW under a 1. 8 V supply voltage.
文摘The modelling, design and implementation of a high-speed programmable polyphase finite impulse response (FIR) filter with field programmable gate array (FPGA) technology are described. This FIR filter can run automatically according to the programmable configuration word including symmetry/asymmetry, odd/even taps, from 32 taps up to 256 taps. The filter with 12 bit signal and 12 bit coefficient word-length has been realized on a Xilinx VirtexⅡ-v1500 device and operates at the maximum sampling frequency of (160 MHz.)
基金We are grateful for financial supports from National Major Research and Development Program(No.2018YFB2200200)National Science Fund for Distinguished Young Scholars(61725503)+1 种基金Zhejiang Provincial Natural Science Foundation(LZ18F050001,LGF21F050003)National Natural Science Foundation of China(NSFC)(91950205,6191101294,11861121002,61905209,62175214,62111530147).
文摘Chip-scale programmable optical signal processors are often used to flexibly manipulate the optical signals for satisfying the demands in various applications,such as lidar,radar,and artificial intelligence.Silicon photonics has unique advantages of ultra-high integration density as well as CMOS compatibility,and thus makes it possible to develop large-scale programmable optical signal processors.The challenge is the high silicon waveguides propagation losses and the high calibration complexity for all tuning elements due to the random phase errors.In this paper,we propose and demonstrate a programmable silicon photonic processor for the first time by introducing low-loss multimode photonic waveguide spirals and low-random-phase-error Mach-Zehnder switches.The present chip-scale programmable silicon photonic processor comprises a 1×4 variable power splitter based on cascaded Mach-Zehnder couplers(MZCs),four Ge/Si photodetectors,four channels of thermally-tunable optical delaylines.Each channel consists of a continuously-tuning phase shifter based on a waveguide spiral with a micro-heater and a digitally-tuning delayline realized with cascaded waveguide-spiral delaylines and MZSs for 5.68 ps time-delay step.Particularly,these waveguide spirals used here are designed to be as wide as 2μm,enabling an ultralow propagation loss of 0.28 dB/cm.Meanwhile,these MZCs and MZSs are designed with 2-μm-wide arm waveguides,and thus the random phase errors in the MZC/MZS arms are negligible,in which case the calibration for these MZSs/MZCs becomes easy and furthermore the power consumption for compensating the phase errors can be reduced greatly.Finally,this programmable silicon photonic processor is demonstrated successfully to verify a number of distinctively different functionalities,including tunable time-delay,microwave photonic beamforming,arbitrary optical signal filtering,and arbitrary waveform generation.
基金The National Natural Science Foundation of China(No60472057)
文摘The design of a programmable frequency divider, which is one of the components of the phase-locked loop （PLL） frequency synthesizer for transmitter and receiver in IEEE 802. 11 a standard, is investigated. The main steps in very large-scale integration （VLSI） design flow such as logic synthesis, floorplan and placement ＆ routing （P ＆ R） are introduced. By back-annotating the back-end information to the front-end design, the custom wire-load model is created and used for optimizing the design flow under deep submicron technology. The programmable frequency divider is implemented based on Artisan TSMC （Taiwan Semicoductor Manufacturing Co. Ltd. ）0. 18μm CMOS （complementary metal-oxide-semiconductor） standard cells and fabricated. The Chip area is 1 360. 5μm^2 and can work in the range of 100 to 200 MHz. The measurement results indicate that the design conforms to the frequency division precision.
基金This work was supported in part by the National Science Foundation,USA(ECCS-2018492,CNS-2006828,ECCS-2002897,and OIA-2040599).
文摘Communication-dependent and software-based distributed energy resources(DERs)are extensively integrated into modern microgrids,providing extensive benefits such as increased distributed controllability,scalability,and observability.However,malicious cyber-attackers can exploit various potential vulnerabilities.In this study,a programmable adaptive security scanning(PASS)approach is presented to protect DER inverters against various power-bot attacks.Specifically,three different types of attacks,namely controller manipulation,replay,and injection attacks,are considered.This approach employs both software-defined networking technique and a novel coordinated detection method capable of enabling programmable and scalable networked microgrids(NMs)in an ultra-resilient,time-saving,and autonomous manner.The coordinated detection method efficiently identifies the location and type of power-bot attacks without disrupting normal NM operations.Extensive simulation results validate the efficacy and practicality of the PASS for securing NMs.
基金Project supported by The Joint Foundation Program of Beijing Municipal Natural Science Foundation and Beijing Municipal Education Commission(KZ201810028045)。
文摘Synergistic chemotherapy-photothermal therapy(CT-PTT)can improve the cancer treatment efficacy,but its treatment effect is still limited by factors such as targeting efficiency and treatment sequence.Herein,a H_(2)S-responsive metal organic frameworks(MOFs)coated rare-earth nanocomposite(csEr@-MOF)was constructed and loaded with a chemotherapeutic drug(DOX)and a heat shock protein(HSP)inhibitor(Shepherdin).As the drug-loaded csEr@MOF reaches the H_(2)S-riched colorectal tumor region,based on the reaction between H_(2)S and MOF,Shepherdin is released for inhibiting the function of HSPs,the generated CuS is used for PTT and DOX is released for CT.Through being monitored by ratiometric imaging of rare-earth nanocomposite,it is possible to perform the precise treatment timing for PTT.With the help of Shepherdin,the treatment effect of PTT was enhanced.Therefore,programmable CT-PTT synergistic cancer therapy activated by a single H_(2)S trigger is achieved in vitro and in vivo.This work provides new ideas for designing tumor microenvironment-responsive therapeutic agents for programmable synergistic therapy with better targeting and therapeutic efficiency.
基金Science &Technology Plan Foundation of Hunan Province,China(No.2010F3102)Science Research Foundation of Hunan Province,China(No.08C392)
文摘In order to obtain variable characteristics,the digital filter's type,number of taps and coefficients should be changed constantly such that the desired frequency-domain characteristics can be obtained.This paper proposes a method for self-programmable variable digital filter(VDF) design based on field programmable gate array(FPGA).We implement a digital filter system by using custom embedded micro-processor,programmable finite impulse response(P-FIR) macro module,coefficient-loader,clock manager and analog/digital(A/D) or digital/analog(D/A) controller and other modules.The self-programmable VDF can provide the best solution for realization of digital filter algorithms,which are the low-pass,high-pass,band-pass and band-stop filter algorithms with variable frequency domain characteristics.The design examples with minimum 1 to maximum 32 taps FIR filter,based on Modelsim post-routed simulation and onboard running on XUPV5-LX110T,are provided to demonstrate the effectiveness of the proposed method.
基金supported by the Fund for International Cooperation and Exchange of National Natural Science Foundation of China(61761136007)the National Key Research and Development Program of China(2017YFA0700201,2017YFA0700202,and 2017YFA0700203)+3 种基金the National Natural Science Foundation of China(6217010363,61631007,61571117,61501112,61501117,61871109,61522106,61731010,61735010,61722106,61701107,and 61701108)the Natural Science Foundation of Jiangsu Province(BK20211161)the 111 Project(111-2-05)ZhiShan Young Scholar Program of Southeast University.
文摘In current wireless communication and electronic systems,digital signals and electromagnetic(EM)radiation are processed by different modules.Here,we propose a mechanism to fuse the modulation of digital signals and the manipulation of EM radiation on a single programmable metasurface(PM).The PM consists of massive subwavelength-scale digital coding elements.A set of digital states of all elements forms simultaneous digital information roles for modulation and the wave-control sequence code of the PM.By designing digital coding sequences in the spatial and temporal domains,the digital information and farfield patterns of the PM can be programmed simultaneously and instantly in desired ways.For the experimental demonstration of the mechanism,we present a programmable wireless communication system.The same system can realize transmissions of digital information in single-channel modes with beamsteerable capability and multichannel modes with multiple independent information.The measured results show the excellent performance of the programmable system.This work provides excellent prospects for applications in fifth-or sixth-generation wireless communications and modern intelligent platforms for unmanned aircrafts and vehicles.
