Active power filter (APF) using novel virtual line-flux-linkage oriented control strategy can not only realizes no phase-locked-loop (PLL) control, but also achieves a good inhibitory effect to interfere. However, the...Active power filter (APF) using novel virtual line-flux-linkage oriented control strategy can not only realizes no phase-locked-loop (PLL) control, but also achieves a good inhibitory effect to interfere. However, there are some problems in the conventional method, such as the error of amplitude, the shift of phase angle and the non-determinacy of initial oriented angle. In this paper, two one-order low-pass filters are adopted instead of the pure integrator in the virtual line-flux-linkage observer, which can steady the phase and amplitude. Furthermore, an original scheme of harmonics detection under the rotating coordinate is advanced based on the simplified space vector pulse width modulation (SVPWM) strategy. Meanwhile, by using the new SVPWM algorithm, the voltage space vector diagram of the three-level inverter can be simplified and applied into that of two-level inverter, and this makes the control for Neutral Point potential easier.展开更多
Synchronous reluctance motors(SynRM)are widely employed in industrial applications due to their high robustness,low cost,and absence of permanent magnets.In recent years,significant research efforts have focused on im...Synchronous reluctance motors(SynRM)are widely employed in industrial applications due to their high robustness,low cost,and absence of permanent magnets.In recent years,significant research efforts have focused on improving the controllability and efficiency of SynRM.Accurate rotor position information is essential for the controller to generate appropriate current and voltage references corresponding to the desired speed and load torque.Shaft-mounted position sensors are generally undesirable because of their high cost,sensitivity to harsh operating conditions,maintenance requirements,and reduced reliability in environments characterized by high vibration.Consequently,sensorless control techniques that estimate rotor position using measured stator currents and voltages have attracted increasing attention.However,magnetic saturation,parameter nonlinearities,and cross-coupling effects significantly degrade position estimation accuracy and may compromise the stability of sensorless SynRM drives.In this paper,a nonlinear SynRM model is developed using finite element analysis(FEA)to accurately capture magnetic saturation and cross-coupling effects,thereby providing a precise representation of the machine’s electromagnetic behavior under varying load and flux conditions.A series of magnetostatic FEA simulations is performed.To reduce computational complexity,only one motor pole is analyzed by applying anti-periodic boundary conditions along the domain sides and enforcing a zero magnetic vector potential on the external stator boundary.Nonlinear iron material properties are modeled using the appropriate B-H curve.The simulations are carried out by imposing d-and q-axis current components and computing the corresponding flux linkages and electromagnetic torque.Based on these results,both apparent and incremental inductances are extracted and incorporated into the control algorithm.An advanced fictitious flux linkage method combined with a phase-locked loop(PLL)is employed for accurate rotor position estimation.Simulation results confirm that the proposed sensorless control strategy ensures stable operation and high position estimation accuracy over the entire speed range.展开更多
This paper proposes a novel Gm-C loop filter instead of a conventional passive loop filter used in a phase-locked loop. The innovative advantage of the proposed architecture is tunable loop filter bandwidth and hence ...This paper proposes a novel Gm-C loop filter instead of a conventional passive loop filter used in a phase-locked loop. The innovative advantage of the proposed architecture is tunable loop filter bandwidth and hence the process variations of passive elements of resistance R and capacitance C can be overcome and the chip area is greatly reduced. Furthermore, the MASH 1-1-1 sigma-delta （ZA） modulator is adopted for performing the fractional division number and hence improves the phase noise as well. Measured results show that the locked phase noise is -114.1 dBc/Hz with lower Gm-C bandwidth and -111.7 dBm/C with higher Gm-C bandwidth at 1 MHz offset from carrier of 5.68 GHz. Including pads and built-in Gm-C filter, the chip area of the proposed frequency synthesizer is 1.06 mm2. The output power is -8.69 dBm at 5.68 CHz and consumes 56 mW with an off-chip buffer from 1.8-V supply voltage.展开更多
The stable operation of first and second order Zero Crossing Digital Phase Locked Loop (ZCDPLL) is extended by using a Fixed Point Iteration (FPI) method with relaxation. The non-linear components of ZCDPLL such as sa...The stable operation of first and second order Zero Crossing Digital Phase Locked Loop (ZCDPLL) is extended by using a Fixed Point Iteration (FPI) method with relaxation. The non-linear components of ZCDPLL such as sampler phase detector and Digital Controlled Oscillator (DCO) lead to unstable and chaotic operation when the filter gains are high. FPI will be used to stabilize the chaotic operation and consequently extend the lock range of the loop. The proposed stabilized loop can work in higher filter gains which are needed for faster signal acquisition.展开更多
This work summarizes the structure and operating features of a high-performance 3-stage dual-delay-path (DDP) voltage-controlled ring oscillator (VCRO) with self-biased delay cells for Phase-Locked Loop (PLL) structur...This work summarizes the structure and operating features of a high-performance 3-stage dual-delay-path (DDP) voltage-controlled ring oscillator (VCRO) with self-biased delay cells for Phase-Locked Loop (PLL) structurebased clock generation and digital system driving. For a voltage supply V<sub>DD</sub> = 1.8 V, the resulting set of performance parameters include power consumption P<sub><sub></sub>DC</sub> = 4.68 mW and phase noise PN@1MHz = -107.8 dBc/Hz. From the trade-off involving P<sub>DC</sub> and PN, a system level high performance is obtained considering a reference figure-of-merit ( FoM = -224 dBc/Hz ). Implemented at schematic level by applying CMOS-based technology (UMC L180), the proposed VCRO was designed at Cadence environment and optimized at MunEDA WiCkeD tool.展开更多
文摘Active power filter (APF) using novel virtual line-flux-linkage oriented control strategy can not only realizes no phase-locked-loop (PLL) control, but also achieves a good inhibitory effect to interfere. However, there are some problems in the conventional method, such as the error of amplitude, the shift of phase angle and the non-determinacy of initial oriented angle. In this paper, two one-order low-pass filters are adopted instead of the pure integrator in the virtual line-flux-linkage observer, which can steady the phase and amplitude. Furthermore, an original scheme of harmonics detection under the rotating coordinate is advanced based on the simplified space vector pulse width modulation (SVPWM) strategy. Meanwhile, by using the new SVPWM algorithm, the voltage space vector diagram of the three-level inverter can be simplified and applied into that of two-level inverter, and this makes the control for Neutral Point potential easier.
文摘Synchronous reluctance motors(SynRM)are widely employed in industrial applications due to their high robustness,low cost,and absence of permanent magnets.In recent years,significant research efforts have focused on improving the controllability and efficiency of SynRM.Accurate rotor position information is essential for the controller to generate appropriate current and voltage references corresponding to the desired speed and load torque.Shaft-mounted position sensors are generally undesirable because of their high cost,sensitivity to harsh operating conditions,maintenance requirements,and reduced reliability in environments characterized by high vibration.Consequently,sensorless control techniques that estimate rotor position using measured stator currents and voltages have attracted increasing attention.However,magnetic saturation,parameter nonlinearities,and cross-coupling effects significantly degrade position estimation accuracy and may compromise the stability of sensorless SynRM drives.In this paper,a nonlinear SynRM model is developed using finite element analysis(FEA)to accurately capture magnetic saturation and cross-coupling effects,thereby providing a precise representation of the machine’s electromagnetic behavior under varying load and flux conditions.A series of magnetostatic FEA simulations is performed.To reduce computational complexity,only one motor pole is analyzed by applying anti-periodic boundary conditions along the domain sides and enforcing a zero magnetic vector potential on the external stator boundary.Nonlinear iron material properties are modeled using the appropriate B-H curve.The simulations are carried out by imposing d-and q-axis current components and computing the corresponding flux linkages and electromagnetic torque.Based on these results,both apparent and incremental inductances are extracted and incorporated into the control algorithm.An advanced fictitious flux linkage method combined with a phase-locked loop(PLL)is employed for accurate rotor position estimation.Simulation results confirm that the proposed sensorless control strategy ensures stable operation and high position estimation accuracy over the entire speed range.
文摘This paper proposes a novel Gm-C loop filter instead of a conventional passive loop filter used in a phase-locked loop. The innovative advantage of the proposed architecture is tunable loop filter bandwidth and hence the process variations of passive elements of resistance R and capacitance C can be overcome and the chip area is greatly reduced. Furthermore, the MASH 1-1-1 sigma-delta （ZA） modulator is adopted for performing the fractional division number and hence improves the phase noise as well. Measured results show that the locked phase noise is -114.1 dBc/Hz with lower Gm-C bandwidth and -111.7 dBm/C with higher Gm-C bandwidth at 1 MHz offset from carrier of 5.68 GHz. Including pads and built-in Gm-C filter, the chip area of the proposed frequency synthesizer is 1.06 mm2. The output power is -8.69 dBm at 5.68 CHz and consumes 56 mW with an off-chip buffer from 1.8-V supply voltage.
文摘The stable operation of first and second order Zero Crossing Digital Phase Locked Loop (ZCDPLL) is extended by using a Fixed Point Iteration (FPI) method with relaxation. The non-linear components of ZCDPLL such as sampler phase detector and Digital Controlled Oscillator (DCO) lead to unstable and chaotic operation when the filter gains are high. FPI will be used to stabilize the chaotic operation and consequently extend the lock range of the loop. The proposed stabilized loop can work in higher filter gains which are needed for faster signal acquisition.
文摘This work summarizes the structure and operating features of a high-performance 3-stage dual-delay-path (DDP) voltage-controlled ring oscillator (VCRO) with self-biased delay cells for Phase-Locked Loop (PLL) structurebased clock generation and digital system driving. For a voltage supply V<sub>DD</sub> = 1.8 V, the resulting set of performance parameters include power consumption P<sub><sub></sub>DC</sub> = 4.68 mW and phase noise PN@1MHz = -107.8 dBc/Hz. From the trade-off involving P<sub>DC</sub> and PN, a system level high performance is obtained considering a reference figure-of-merit ( FoM = -224 dBc/Hz ). Implemented at schematic level by applying CMOS-based technology (UMC L180), the proposed VCRO was designed at Cadence environment and optimized at MunEDA WiCkeD tool.
