As a typical in-memory computing hardware design, nonvolatile ternary content-addressable memories(TCAMs) enable the logic operation and data storage for high throughout in parallel big data processing. However,TCAM c...As a typical in-memory computing hardware design, nonvolatile ternary content-addressable memories(TCAMs) enable the logic operation and data storage for high throughout in parallel big data processing. However,TCAM cells based on conventional silicon-based devices suffer from structural complexity and large footprintlimitations. Here, we demonstrate an ultrafast nonvolatile TCAM cell based on the MoTe2/hBN/multilayergraphene (MLG) van der Waals heterostructure using a top-gated partial floating-gate field-effect transistor(PFGFET) architecture. Based on its ambipolar transport properties, the carrier type in the source/drain andcentral channel regions of the MoTe2 channel can be efficiently tuned by the control gate and top gate, respectively,enabling the reconfigurable operation of the device in either memory or FET mode. When working inthe memory mode, it achieves an ultrafast 60 ns programming/erase speed with a current on-off ratio of ∼105,excellent retention capability, and robust endurance. When serving as a reconfigurable transistor, unipolar p-typeand n-type FETs are obtained by adopting ultrafast 60 ns control-gate voltage pulses with different polarities.The monolithic integration of memory and logic within a single device enables the content-addressable memory(CAM) functionality. Finally, by integrating two PFGFETs in parallel, a TCAM cell with a high current ratioof ∼10^(5) between the match and mismatch states is achieved without requiring additional peripheral circuitry.These results provide a promising route for the design of high-performance TCAM devices for future in-memorycomputing applications.展开更多
A novel surface-type nonvolatile electric memory elements based on organic semiconductors CuPc and H2Pc are fabricated by vacuum deposition of the CuPc and H2Pc films on preliminary deposited metallic （Ag and Cu） el...A novel surface-type nonvolatile electric memory elements based on organic semiconductors CuPc and H2Pc are fabricated by vacuum deposition of the CuPc and H2Pc films on preliminary deposited metallic （Ag and Cu） electrodes. The gap between Ag and Cu electrodes is 3040μm. For the current-voltage （I-V） characteristics the memory effect, switching effect, and negative differential resistance regions are observed. The switching mechanism is attributed to the electric-field-induced charge transfer. As a result the device switches from a low to a high-conductivity state and then back to a low conductivity state if the opposite polarity voltage is applied. The ratio of resistance at the high resistance state to that at the low resistance state is equal to 120-150. Under the switching condition, the electric current increases -- 80-100 times. A comparison between the forward and reverse I-V characteristics shows the presence of rectifying behavior.展开更多
Pd-Al2O3-Si capacitors with Ru nanocrystals are fabricated and electrically characterized for nonvolatile memory application. While keeping the entire insulator Al2O3 thickness fixed, the memory window has a strong de...Pd-Al2O3-Si capacitors with Ru nanocrystals are fabricated and electrically characterized for nonvolatile memory application. While keeping the entire insulator Al2O3 thickness fixed, the memory window has a strong dependence on the tunneling layer thickness under low operating voltages, whereas it has weak dependence under high operating voltages. As for the optimal configuration comprised of 6-nm tunneling layer and 22-nm blocking layer, the resulting memory window increases from 1.5 V to 5.3 V with bias pulse increasing from 10-5 s to 10-2 s under ±7 V. A ten-year memory window as large as 5.2 V is extrapolated at room temperature after ±8 V/1 ms programming/erasing pulses.展开更多
A method of fabricating Cu nanocrystals embedded in SiO2 dielectric film for nonvolatile memory applications by magnetron sputtering is introduced in this paper. The average size and distribution density of Cu nanocry...A method of fabricating Cu nanocrystals embedded in SiO2 dielectric film for nonvolatile memory applications by magnetron sputtering is introduced in this paper. The average size and distribution density of Cu nanocrystal grains are controlled by adjusting experimental parameters. The relationship between nanocrystal floating gate micro-structure and its charge storage capability is also discussed theoretically.展开更多
In this study,we present an organic field-effect transistor floating-gate memory using polysilicon(poly-Si)as a charge trapping layer.The memory device is fabricated on a N^+-Si/SiO2 substrate.Poly-Si,polymethylmethac...In this study,we present an organic field-effect transistor floating-gate memory using polysilicon(poly-Si)as a charge trapping layer.The memory device is fabricated on a N^+-Si/SiO2 substrate.Poly-Si,polymethylmethacrylate,and pentacene are used as a floating-gate layer,tunneling layer,and active layer,respectively.The device shows bidirectional storage characteristics under the action of programming/erasing(P/E)operation due to the supplied electrons and holes in the channel and the bidirectional charge trapping characteristic of the poly-Si floating-gate.The carrier mobility and switching current ratio(Ion/Ioff ratio)of the device with a tunneling layer thickness of 85 nm are 0.01 cm^2·V^-1·s^-1 and 102,respectively.A large memory window of 9.28 V can be obtained under a P/E voltage of±60 V.展开更多
The N2-plasma treatment on a HfO2 blocking layer of Au nanocrystal nonvolatile memory without any post annealing is investigated. The electrical characteristics of the MOS capacitor with structure of Al–Ta N/HfO2/Si ...The N2-plasma treatment on a HfO2 blocking layer of Au nanocrystal nonvolatile memory without any post annealing is investigated. The electrical characteristics of the MOS capacitor with structure of Al–Ta N/HfO2/Si O2/p-Si are also characterized. After N2-plasma treatment, the nitrogen atoms are incorporated into HfO2 film and may passivate the oxygen vacancy states. The surface roughness of HfO2 film can also be reduced. Those improvements of HfO2 film lead to a smaller hysteresis and lower leakage current density of the MOS capacitor. The N2-plasma is introduced into Au nanocrystal（NC） nonvolatile memory to treat the HfO2 blocking layer. For the N2-plasma treated device, it shows a better retention characteristic and is twice as large in the memory window than that for the no N2-plasma treated device. It can be concluded that the N2-plasma treatment method can be applied to future nonvolatile memory applications.展开更多
The exploration of novel photo/thermal-responsive nonvolatile memorizers will be beneficial for energysaving memories.Herein,new<110>-oriented perovskites using single template melamine,i.e.,[(MLAI-H_(2))(PbX_(4...The exploration of novel photo/thermal-responsive nonvolatile memorizers will be beneficial for energysaving memories.Herein,new<110>-oriented perovskites using single template melamine,i.e.,[(MLAI-H_(2))(PbX_(4))]_n(X=Br (α-1),Cl (α-2),MLAI=melamine) have been prepared and their structures upon irradiation of visible light have been investigated.They have been fabricated as nonvolatile memory devices with structures of ITO/[(MLAI-H_(2))(PbX_(4))]_n/PMMA/Ag (device-1:X=Br,device-2:X=Cl),which can exhibit unique visible light-triggered binary nonvolatile memory performances.Interestingly,the silent or working status can be monitored by visible chromisms.Furthermore,the light-triggered binary resistive switching mechanisms of these ITO/[(MLAI-H_(2))(PbX_(4))]_n/PMMA/Ag memory devices have been clarified in terms of EPR,fluorescence,and single-crystal structural analysis.The presence of light-activated traps in<110>-oriented[(MLAI-H_(2))(PbX_(4))]_n perovskites are dominated in the appearance of light-triggered resistive switching behaviors,based on which the inverted internal electrical fields can be established.According to the structural analysis,the more distorted PbX_6octahedra,higher corrugated<110>-oriented perovskite sheets,and more condensed organic-inorganic packing in Br-containing perovskite are beneficial for the stabilization of light-activated traps,which lead to the better resistive switching behavior of device-1.This work can pave a new avenue for the establishment of novel energy-saving nonvolatile memorizers used in aerospace or military industries.展开更多
Amorphous In–Ga–Zn–O(a-IGZO)thin-film transistor(TFT)memories with novel p-SnO/n-SnO_(2) heterojunction charge trapping stacks(CTSs)are investigated comparatively under a maximum fabrication temperature of 280℃.Co...Amorphous In–Ga–Zn–O(a-IGZO)thin-film transistor(TFT)memories with novel p-SnO/n-SnO_(2) heterojunction charge trapping stacks(CTSs)are investigated comparatively under a maximum fabrication temperature of 280℃.Compared to a single p-SnO or n-SnO_(2) charge trapping layer(CTL),the heterojunction CTSs can achieve electrically programmable and erasable characteristics as well as good data retention.Of the two CTSs,the tunneling layer/p-SnO/nSnO_(2)/blocking layer architecture demonstrates much higher program efficiency,more robust data retention,and comparably superior erase characteristics.The resulting memory window is as large as 6.66 V after programming at 13 V/1 ms and erasing at-8 V/1 ms,and the ten-year memory window is extrapolated to be 4.41 V.This is attributed to shallow traps in p-SnO and deep traps in n-SnO_(2),and the formation of a built-in electric field in the heterojunction.展开更多
Based on the charge storage mode,it is important to investigate the scaling dependence of memory performance in silicon nanocrystal（Si-NC） nonvolatile memory（NVM） devices for its scaling down limit.In this work,we...Based on the charge storage mode,it is important to investigate the scaling dependence of memory performance in silicon nanocrystal（Si-NC） nonvolatile memory（NVM） devices for its scaling down limit.In this work,we made eight kinds of test key cells with different gate widths and lengths by 0.13-μm node complementary metal oxide semiconductor（CMOS） technology.It is found that the memory windows of eight kinds of test key cells are almost the same of about1.64 V @ ±7 V/1 ms,which are independent of the gate area,but mainly determined by the average size（12 nm） and areal density（1.8×10^（11）/cm^2） of Si-NCs.The program/erase（P/E） speed characteristics are almost independent of gate widths and lengths.However,the erase speed is faster than the program speed of test key cells,which is due to the different charging behaviors between electrons and holes during the operation processes.Furthermore,the data retention characteristic is also independent of the gate area.Our findings are useful for further scaling down of Si-NC NVM devices to improve the performance and on-chip integration.展开更多
A novel high-κ~ A1203/HfO2/AI203 nanolaminate charge trapping memory capacitor structure based on SiGe substrates with low interface densities is successfully fabricated and investigated. The memory capacitor exhibit...A novel high-κ~ A1203/HfO2/AI203 nanolaminate charge trapping memory capacitor structure based on SiGe substrates with low interface densities is successfully fabricated and investigated. The memory capacitor exhibits excellent program-erasable characteristics. A large memory window of ~4 V, a small leakage current density of ~2 ×10-6 Acre-2 at a gate voltage of 7V, a high charge trapping density of 1.42 × 1013 cm-2 at a working vo]tage of 4-10 V and good retention characteristics are observed. Furthermore, the programming （△ VFB = 2.8 V at 10 V for 10μs） and erasing speeds （△VFB =-1.7 V at -10 V for 10μs） of the fabricated capacitor based on SiGe substrates are significantly improved as compared with counterparts reported earlier. It is concluded that the high-κ Al2O3/HfO2/Al2O3 nanolaminate charge trapping capacitor structure based on SiGe substrates is a promising candidate for future nano-scaled nonvolatile flash memory applications.展开更多
Memristor is a newly found fourth circuit element for the next generation emerging nonvolatile memory technology. In this paper, design of new type of nonvolatile static random access memory cell is proposed by using ...Memristor is a newly found fourth circuit element for the next generation emerging nonvolatile memory technology. In this paper, design of new type of nonvolatile static random access memory cell is proposed by using a combination of memristor and complemented metal oxide semiconductor. Biolek memristor model and CMOS 180 nm technology are used to form a single cell. By introducing distinct binary logic to avoid safety margin is left for each binary logic output and enables better read/write data integrity. The total power consumption reduces from 0.407 mw (milli-watt) to 0.127 mw which is less than existing memristor based memory cell of the same CMOS technology. Read and write time is also significantly reduced. However, write time is higher than conventional 6T SRAM cell and can be reduced by increasing motion of electron in the memristor. The change of the memristor state is shown by applying piecewise linear input voltage.展开更多
Si-doped Ge2Sb2Te5 films have been prepared by dc magnetron co-sputtering with Ge2Sb2Te5 and Si targets. The addition of Si in the Ge2Sb2Te5 film results in the increase of both crystallization temperature and phasetr...Si-doped Ge2Sb2Te5 films have been prepared by dc magnetron co-sputtering with Ge2Sb2Te5 and Si targets. The addition of Si in the Ge2Sb2Te5 film results in the increase of both crystallization temperature and phasetransition temperature from face-centred-cubic （fcc） phase to hexagonal （hex） phase. The resistivity of the Ge2Sb2Te5 film shows a significant increase with the Si doping. When doping 11.8 at.% of Si in the film, the resistivity after 460℃ annealing increases from 1 to 11 mΩ.cm and dynamic resistance increase from 64 to 99Ω compared to the undoped Ge2Sb2Te5 film. This is very helpful to writing current reduction of phase-change random access memory.展开更多
Phase change memory （PCM） cell array is fabricated by a standard complementary metal-oxide-semiconductor process and the subsequent special fabrication technique. A chalcogenide Ge2Sb2Te5 film in thickness 50hm depo...Phase change memory （PCM） cell array is fabricated by a standard complementary metal-oxide-semiconductor process and the subsequent special fabrication technique. A chalcogenide Ge2Sb2Te5 film in thickness 50hm deposited by rf magnetron sputtering is used as storage medium for the PCM cell. Large snap-back effect is observed in current-voltage characteristics, indicating the phase transition from an amorphous state （higher resistance state） to the crystalline state （lower resistance state）. The resistance of amorphous state is two orders of magnitude larger than that of the crystalline state from the resistance measurement, and the threshold current needed for phase transition of our fabricated PCM cell array is very low （only several μA）. An x-ray total dose radiation test is carried out on the PCM cell array and the results show that this kind of PCM cell has excellent total dose radiation tolerance with total dose up to 2 ×10^6 rad（Si）, which makes it attractive for space-based applications.展开更多
Designed ZrxSi1-xO2 films with combining bent and flat energy bands are employed as a charge trapping layer for memory capacitors.Compared to a single bent energy band,the bandgap structure with combining bent and fla...Designed ZrxSi1-xO2 films with combining bent and flat energy bands are employed as a charge trapping layer for memory capacitors.Compared to a single bent energy band,the bandgap structure with combining bent and flat energy bands exhibits larger memory window,faster program/erase speed,lower charge loss even at 200℃ for 104s,and wider temperature insensitive regions.The tunneling thickness together with electron recaptured efficiency in the trapping layer,and the balance of two competing electron loss mechanisms in the bent and flat energy band regions collectively contribute to the improved memory characteristics.Therefore,the proposed ZrxSi1-xO2 with combining bent and flat energy bands should be a promising candidate for future nonvolatile memory applications,taking into consideration of the trade-off between the operation speed and retention characteristics.展开更多
In this work,an idea which applies binary alloy nanocrystal floating gate to nonvolatile memory application was introduced.The relationship between binary alloy’s work function and its composition was discussed theor...In this work,an idea which applies binary alloy nanocrystal floating gate to nonvolatile memory application was introduced.The relationship between binary alloy’s work function and its composition was discussed theoretically.A nanocrystal floating gate structure with NiFe nanocrystals embedded in SiO2 dielectric layers was fabricated by magnetron sputtering.The micro-structure and composition deviation of the prepared NiFe nanocrystals were also investigated by TEM and EDS.展开更多
A novel two-step method is employed, for the first time, to fabricatc nonvolatile memory devices that have metal nanoerystals. First, size-averaged Au nanocrystals are synthesized chemically; second, they are assemble...A novel two-step method is employed, for the first time, to fabricatc nonvolatile memory devices that have metal nanoerystals. First, size-averaged Au nanocrystals are synthesized chemically; second, they are assembled into memory devices by a spin-coating technique at room temperature. This attractive approach makes it possible to tailor the diameter and control the density of nanocrystals individually. In addition, processes at room temperature prevent Au diffusion, which is a main concem for the application of metal nanocrystal-based memory. The experimental results, both the morphology characterization and the electrical measurements, reveal that there is an optimum density of nanocrystal monolayer to balance between long data retention and a large hysteresis memory window. At the same time, density-controllable devices could also feed the preferential emphasis on either memory window or retention time. All these facts confirm the advantages and novelty of our two-step method.展开更多
We develop a method that uses magnetron sputtering to fabricate barium strontium titanate (BST) nanocrystals embedded in dielectric SiO2 films.Transmission electron microscope images show that the BST nanocrystals hav...We develop a method that uses magnetron sputtering to fabricate barium strontium titanate (BST) nanocrystals embedded in dielectric SiO2 films.Transmission electron microscope images show that the BST nanocrystals have an average diameter of 5 nm and are well distributed in the SiO2 film.In addition,we also analyze the BST nanocrystals composition deviation during the sputtering process by electron dispersive spectroscopy.展开更多
基金supported by the National Key Research&Development Projects of China(Grant No.2022YFA1204100)National Natural Science Foundation of China(Grant No.62488201)+1 种基金CAS Project for Young Scientists in Basic Research(YSBR-003)the Innovation Program of Quantum Science and Technology(2021ZD0302700)。
文摘As a typical in-memory computing hardware design, nonvolatile ternary content-addressable memories(TCAMs) enable the logic operation and data storage for high throughout in parallel big data processing. However,TCAM cells based on conventional silicon-based devices suffer from structural complexity and large footprintlimitations. Here, we demonstrate an ultrafast nonvolatile TCAM cell based on the MoTe2/hBN/multilayergraphene (MLG) van der Waals heterostructure using a top-gated partial floating-gate field-effect transistor(PFGFET) architecture. Based on its ambipolar transport properties, the carrier type in the source/drain andcentral channel regions of the MoTe2 channel can be efficiently tuned by the control gate and top gate, respectively,enabling the reconfigurable operation of the device in either memory or FET mode. When working inthe memory mode, it achieves an ultrafast 60 ns programming/erase speed with a current on-off ratio of ∼105,excellent retention capability, and robust endurance. When serving as a reconfigurable transistor, unipolar p-typeand n-type FETs are obtained by adopting ultrafast 60 ns control-gate voltage pulses with different polarities.The monolithic integration of memory and logic within a single device enables the content-addressable memory(CAM) functionality. Finally, by integrating two PFGFETs in parallel, a TCAM cell with a high current ratioof ∼10^(5) between the match and mismatch states is achieved without requiring additional peripheral circuitry.These results provide a promising route for the design of high-performance TCAM devices for future in-memorycomputing applications.
基金supported by the GIK Institute of Engineering Science and Technology,Pakistan and Physical Technical Institute of Academy of Sciences of Tajikistan
文摘A novel surface-type nonvolatile electric memory elements based on organic semiconductors CuPc and H2Pc are fabricated by vacuum deposition of the CuPc and H2Pc films on preliminary deposited metallic （Ag and Cu） electrodes. The gap between Ag and Cu electrodes is 3040μm. For the current-voltage （I-V） characteristics the memory effect, switching effect, and negative differential resistance regions are observed. The switching mechanism is attributed to the electric-field-induced charge transfer. As a result the device switches from a low to a high-conductivity state and then back to a low conductivity state if the opposite polarity voltage is applied. The ratio of resistance at the high resistance state to that at the low resistance state is equal to 120-150. Under the switching condition, the electric current increases -- 80-100 times. A comparison between the forward and reverse I-V characteristics shows the presence of rectifying behavior.
基金Project supported by the National Key Technology Research and Development Program of China(Grant No.2009ZX02302-002)the National Natural Science Foundation of China(Grant No.61274088)the Program for New Century Excellent Talents in University of Ministry of Education of China(Grant No.NCET-08-0127)
文摘Pd-Al2O3-Si capacitors with Ru nanocrystals are fabricated and electrically characterized for nonvolatile memory application. While keeping the entire insulator Al2O3 thickness fixed, the memory window has a strong dependence on the tunneling layer thickness under low operating voltages, whereas it has weak dependence under high operating voltages. As for the optimal configuration comprised of 6-nm tunneling layer and 22-nm blocking layer, the resulting memory window increases from 1.5 V to 5.3 V with bias pulse increasing from 10-5 s to 10-2 s under ±7 V. A ten-year memory window as large as 5.2 V is extrapolated at room temperature after ±8 V/1 ms programming/erasing pulses.
文摘A method of fabricating Cu nanocrystals embedded in SiO2 dielectric film for nonvolatile memory applications by magnetron sputtering is introduced in this paper. The average size and distribution density of Cu nanocrystal grains are controlled by adjusting experimental parameters. The relationship between nanocrystal floating gate micro-structure and its charge storage capability is also discussed theoretically.
文摘In this study,we present an organic field-effect transistor floating-gate memory using polysilicon(poly-Si)as a charge trapping layer.The memory device is fabricated on a N^+-Si/SiO2 substrate.Poly-Si,polymethylmethacrylate,and pentacene are used as a floating-gate layer,tunneling layer,and active layer,respectively.The device shows bidirectional storage characteristics under the action of programming/erasing(P/E)operation due to the supplied electrons and holes in the channel and the bidirectional charge trapping characteristic of the poly-Si floating-gate.The carrier mobility and switching current ratio(Ion/Ioff ratio)of the device with a tunneling layer thickness of 85 nm are 0.01 cm^2·V^-1·s^-1 and 102,respectively.A large memory window of 9.28 V can be obtained under a P/E voltage of±60 V.
基金supported by the High Level Talent Project of Xiamen University of Technology,China(Grant Nos.YKJ16012R and YKJ16016R)the National Natural Science Foundation of China(Grant No.51702271)
文摘The N2-plasma treatment on a HfO2 blocking layer of Au nanocrystal nonvolatile memory without any post annealing is investigated. The electrical characteristics of the MOS capacitor with structure of Al–Ta N/HfO2/Si O2/p-Si are also characterized. After N2-plasma treatment, the nitrogen atoms are incorporated into HfO2 film and may passivate the oxygen vacancy states. The surface roughness of HfO2 film can also be reduced. Those improvements of HfO2 film lead to a smaller hysteresis and lower leakage current density of the MOS capacitor. The N2-plasma is introduced into Au nanocrystal（NC） nonvolatile memory to treat the HfO2 blocking layer. For the N2-plasma treated device, it shows a better retention characteristic and is twice as large in the memory window than that for the no N2-plasma treated device. It can be concluded that the N2-plasma treatment method can be applied to future nonvolatile memory applications.
基金financially supported by the Natural Science Foundation of Fujian Province(Nos.2021J02007,2021J01553)Fujian Science&Technology Innovation Laboratory for Optoelectronic Information of China(No.2021ZR148)。
文摘The exploration of novel photo/thermal-responsive nonvolatile memorizers will be beneficial for energysaving memories.Herein,new<110>-oriented perovskites using single template melamine,i.e.,[(MLAI-H_(2))(PbX_(4))]_n(X=Br (α-1),Cl (α-2),MLAI=melamine) have been prepared and their structures upon irradiation of visible light have been investigated.They have been fabricated as nonvolatile memory devices with structures of ITO/[(MLAI-H_(2))(PbX_(4))]_n/PMMA/Ag (device-1:X=Br,device-2:X=Cl),which can exhibit unique visible light-triggered binary nonvolatile memory performances.Interestingly,the silent or working status can be monitored by visible chromisms.Furthermore,the light-triggered binary resistive switching mechanisms of these ITO/[(MLAI-H_(2))(PbX_(4))]_n/PMMA/Ag memory devices have been clarified in terms of EPR,fluorescence,and single-crystal structural analysis.The presence of light-activated traps in<110>-oriented[(MLAI-H_(2))(PbX_(4))]_n perovskites are dominated in the appearance of light-triggered resistive switching behaviors,based on which the inverted internal electrical fields can be established.According to the structural analysis,the more distorted PbX_6octahedra,higher corrugated<110>-oriented perovskite sheets,and more condensed organic-inorganic packing in Br-containing perovskite are beneficial for the stabilization of light-activated traps,which lead to the better resistive switching behavior of device-1.This work can pave a new avenue for the establishment of novel energy-saving nonvolatile memorizers used in aerospace or military industries.
基金Project supported by the National Natural Science Foundation of China (Grant No.61874029)。
文摘Amorphous In–Ga–Zn–O(a-IGZO)thin-film transistor(TFT)memories with novel p-SnO/n-SnO_(2) heterojunction charge trapping stacks(CTSs)are investigated comparatively under a maximum fabrication temperature of 280℃.Compared to a single p-SnO or n-SnO_(2) charge trapping layer(CTL),the heterojunction CTSs can achieve electrically programmable and erasable characteristics as well as good data retention.Of the two CTSs,the tunneling layer/p-SnO/nSnO_(2)/blocking layer architecture demonstrates much higher program efficiency,more robust data retention,and comparably superior erase characteristics.The resulting memory window is as large as 6.66 V after programming at 13 V/1 ms and erasing at-8 V/1 ms,and the ten-year memory window is extrapolated to be 4.41 V.This is attributed to shallow traps in p-SnO and deep traps in n-SnO_(2),and the formation of a built-in electric field in the heterojunction.
基金Project supported by the State Key Development Program for Basic Research of China(Grant No.2010CB934402)the National Natural Science Foundation of China(Grant Nos.11374153,61571221,and 61071008)
文摘Based on the charge storage mode,it is important to investigate the scaling dependence of memory performance in silicon nanocrystal（Si-NC） nonvolatile memory（NVM） devices for its scaling down limit.In this work,we made eight kinds of test key cells with different gate widths and lengths by 0.13-μm node complementary metal oxide semiconductor（CMOS） technology.It is found that the memory windows of eight kinds of test key cells are almost the same of about1.64 V @ ±7 V/1 ms,which are independent of the gate area,but mainly determined by the average size（12 nm） and areal density（1.8×10^（11）/cm^2） of Si-NCs.The program/erase（P/E） speed characteristics are almost independent of gate widths and lengths.However,the erase speed is faster than the program speed of test key cells,which is due to the different charging behaviors between electrons and holes during the operation processes.Furthermore,the data retention characteristic is also independent of the gate area.Our findings are useful for further scaling down of Si-NC NVM devices to improve the performance and on-chip integration.
基金Supported by the National Science and Technology Major Project of China under Grant No 2013ZX02303007the National Key Research and Development Program of China under Grant No 2016YFA0301701the Youth Innovation Promotion Association of the Chinese Academy of Sciences under Grant No 2016112
文摘A novel high-κ~ A1203/HfO2/AI203 nanolaminate charge trapping memory capacitor structure based on SiGe substrates with low interface densities is successfully fabricated and investigated. The memory capacitor exhibits excellent program-erasable characteristics. A large memory window of ~4 V, a small leakage current density of ~2 ×10-6 Acre-2 at a gate voltage of 7V, a high charge trapping density of 1.42 × 1013 cm-2 at a working vo]tage of 4-10 V and good retention characteristics are observed. Furthermore, the programming （△ VFB = 2.8 V at 10 V for 10μs） and erasing speeds （△VFB =-1.7 V at -10 V for 10μs） of the fabricated capacitor based on SiGe substrates are significantly improved as compared with counterparts reported earlier. It is concluded that the high-κ Al2O3/HfO2/Al2O3 nanolaminate charge trapping capacitor structure based on SiGe substrates is a promising candidate for future nano-scaled nonvolatile flash memory applications.
文摘Memristor is a newly found fourth circuit element for the next generation emerging nonvolatile memory technology. In this paper, design of new type of nonvolatile static random access memory cell is proposed by using a combination of memristor and complemented metal oxide semiconductor. Biolek memristor model and CMOS 180 nm technology are used to form a single cell. By introducing distinct binary logic to avoid safety margin is left for each binary logic output and enables better read/write data integrity. The total power consumption reduces from 0.407 mw (milli-watt) to 0.127 mw which is less than existing memristor based memory cell of the same CMOS technology. Read and write time is also significantly reduced. However, write time is higher than conventional 6T SRAM cell and can be reduced by increasing motion of electron in the memristor. The change of the memristor state is shown by applying piecewise linear input voltage.
文摘Si-doped Ge2Sb2Te5 films have been prepared by dc magnetron co-sputtering with Ge2Sb2Te5 and Si targets. The addition of Si in the Ge2Sb2Te5 film results in the increase of both crystallization temperature and phasetransition temperature from face-centred-cubic （fcc） phase to hexagonal （hex） phase. The resistivity of the Ge2Sb2Te5 film shows a significant increase with the Si doping. When doping 11.8 at.% of Si in the film, the resistivity after 460℃ annealing increases from 1 to 11 mΩ.cm and dynamic resistance increase from 64 to 99Ω compared to the undoped Ge2Sb2Te5 film. This is very helpful to writing current reduction of phase-change random access memory.
基金Supported by the Chinese Academy of Sciences （Y2005027）, the Science and Technology Council of Shanghai （AM0517, 0452nm012, 04DZ05612, 04ZR14154, 04JC14080, 05JC14076, AM0414, 05nm05043）, the China Postdoctoral Science Foundation, and the K. C. Wong Education Foundation （Hong Kong）.
文摘Phase change memory （PCM） cell array is fabricated by a standard complementary metal-oxide-semiconductor process and the subsequent special fabrication technique. A chalcogenide Ge2Sb2Te5 film in thickness 50hm deposited by rf magnetron sputtering is used as storage medium for the PCM cell. Large snap-back effect is observed in current-voltage characteristics, indicating the phase transition from an amorphous state （higher resistance state） to the crystalline state （lower resistance state）. The resistance of amorphous state is two orders of magnitude larger than that of the crystalline state from the resistance measurement, and the threshold current needed for phase transition of our fabricated PCM cell array is very low （only several μA）. An x-ray total dose radiation test is carried out on the PCM cell array and the results show that this kind of PCM cell has excellent total dose radiation tolerance with total dose up to 2 ×10^6 rad（Si）, which makes it attractive for space-based applications.
基金Project supported by the National Natural Science Foundation of China(Grant No.51402004)the Science and Technology Research Key Project of Education Department of Henan Province of China(Grant No.19A140001)。
文摘Designed ZrxSi1-xO2 films with combining bent and flat energy bands are employed as a charge trapping layer for memory capacitors.Compared to a single bent energy band,the bandgap structure with combining bent and flat energy bands exhibits larger memory window,faster program/erase speed,lower charge loss even at 200℃ for 104s,and wider temperature insensitive regions.The tunneling thickness together with electron recaptured efficiency in the trapping layer,and the balance of two competing electron loss mechanisms in the bent and flat energy band regions collectively contribute to the improved memory characteristics.Therefore,the proposed ZrxSi1-xO2 with combining bent and flat energy bands should be a promising candidate for future nonvolatile memory applications,taking into consideration of the trade-off between the operation speed and retention characteristics.
文摘In this work,an idea which applies binary alloy nanocrystal floating gate to nonvolatile memory application was introduced.The relationship between binary alloy’s work function and its composition was discussed theoretically.A nanocrystal floating gate structure with NiFe nanocrystals embedded in SiO2 dielectric layers was fabricated by magnetron sputtering.The micro-structure and composition deviation of the prepared NiFe nanocrystals were also investigated by TEM and EDS.
文摘A novel two-step method is employed, for the first time, to fabricatc nonvolatile memory devices that have metal nanoerystals. First, size-averaged Au nanocrystals are synthesized chemically; second, they are assembled into memory devices by a spin-coating technique at room temperature. This attractive approach makes it possible to tailor the diameter and control the density of nanocrystals individually. In addition, processes at room temperature prevent Au diffusion, which is a main concem for the application of metal nanocrystal-based memory. The experimental results, both the morphology characterization and the electrical measurements, reveal that there is an optimum density of nanocrystal monolayer to balance between long data retention and a large hysteresis memory window. At the same time, density-controllable devices could also feed the preferential emphasis on either memory window or retention time. All these facts confirm the advantages and novelty of our two-step method.
文摘We develop a method that uses magnetron sputtering to fabricate barium strontium titanate (BST) nanocrystals embedded in dielectric SiO2 films.Transmission electron microscope images show that the BST nanocrystals have an average diameter of 5 nm and are well distributed in the SiO2 film.In addition,we also analyze the BST nanocrystals composition deviation during the sputtering process by electron dispersive spectroscopy.
