By deriving the discrete-time models of a digitally controlled H-bridge inverter system modulated by bipolar sinu- soidal pulse width modulation （BSPWM） and unipolar double-frequency sinusoidal pulse width modulati...By deriving the discrete-time models of a digitally controlled H-bridge inverter system modulated by bipolar sinu- soidal pulse width modulation （BSPWM） and unipolar double-frequency sinusoidal pulse width modulation （UDFSPWM） respectively, the performances of the two modulation strategies are analyzed in detail. The circuit parameters, used in this paper, are fixed. When the systems, modulated by BSPWM and UDFSPWM, have the same switching frequency, the stabil- ity boundaries of the two systems are the same. However, when the equivalent switching frequencies of the two systems are the same, the BSPWM modulated system is more stable than the UDFSPWM modulated system. In addition, a convenient method of establishing the discrete-time model of piecewise smooth system is presented. Finally, the analytical results are confirmed by circuit simulations and experimental measurements.展开更多
This paper mainly concentrates on design of improved controller and its implementation based on single phase synchronous reference frame theory (SRFT) for Dynamic Voltage Restorer (DVR) compensating voltage sag partic...This paper mainly concentrates on design of improved controller and its implementation based on single phase synchronous reference frame theory (SRFT) for Dynamic Voltage Restorer (DVR) compensating voltage sag particularly for nonlinear load. In case of single phase distribution line with nonlinear load, the complexity of controller’s design becomes more serious issue. The present single phase and/or three phase theories applicable to DVR shows poor response to restore voltage sag in case of nonlinear load due to presence of harmonics. Hence restoration of voltage sag in single phase nonlinear load connected system has been a serious concern. Therefore, new controller for DVR has been proposed incorporating effective design concept for fundamental component extraction in case of nonlinear load. The single phase SRFT based main controller for DVR works on two separate closed path viz. feed forward path for quick transient response and feedback path for reducing the steady state error. Moreover, pre-sag mitigation strategy of DVR has been adapted through these two aforementioned paths. Complete design of proposed controller is based on phasor analysis. It also consist of proportional integral (PI) controller to reduce the error in the DC-link voltage during compensation time. The controller performance has been verified in MATLAB Simulink for both types (linear and nonlinear) of load. The results obtained indicates that the proposed controller is effective in its performance.展开更多
This paper deals with implementation of Sinusoidal Pulse-Width-Modulation (SPWM) for a single-phase hybrid power filter generator for Photovoltaic (PV) and wind grid applications. Using policy iteration algorithm, an ...This paper deals with implementation of Sinusoidal Pulse-Width-Modulation (SPWM) for a single-phase hybrid power filter generator for Photovoltaic (PV) and wind grid applications. Using policy iteration algorithm, an improved variable step-size perturbation and observation algorithm is contrived and it is implemented proficiently using a hard-ware description language (VHDL) (Very High Speed Integrated Circuit Hardware Description Language). Subsequently, the new generated grid source supplements the existing grid power in rural houses during its cut off or restricted supply period. The software is used for generating SPWM modulation integrated with a solar-power & wind power grid system which is implemented on the Spartan 3 FPGA. The proposed algorithm performs as a conventional controller in terms of tracking speed and mitigating fluctuation output power in steady state operation which is shown in the experimental results with a commercial PV array and HPW (Height Weight Proportional) show. Simulation results demonstrate the validity with load of the proposed algorithm.展开更多
Multilevel inverter (MLI) is one of the most efficient power converters which are especially suited for high power applications with reduced harmonics. MLI not only achieves high output power and is also used in renew...Multilevel inverter (MLI) is one of the most efficient power converters which are especially suited for high power applications with reduced harmonics. MLI not only achieves high output power and is also used in renewable energy sources such as photovoltaic, wind and fuel cells. Among various topologies of MLI, this paper mainly focuses on cascaded MLI with three unequal DC sources called asymmetric cascaded MLI which reduces the number of power switches. Various modulation techniques are also reviewed in literature [1]. In this paper we focus on sinusoidal (or) multicarrier pulse width modulation (SPWM) which improves the output voltage at lower modulation index for obtaining lower Total Harmonic Distortion (THD) level. The gating signal for the 13-level hybrid inverter using SPWM technique is generated using Field Programmable Gate Array (FPGA) processor. The proposed modulation technique results in reduced percentage of THD, but lower order harmonics are not eliminated. So a new technique called Selective Harmonic Elimination (SHE) is also implemented in order to reduce the lower order harmonics. The optimum switching angles are determined for obtaining minimum THD. The performance evaluation of the proposed PWM inverter is verified using an experimental model of 13-level cascaded hybrid MLI and compared with MATLAB/SIMULINK model.展开更多
基金supported by the National Natural Science Foundation of China (Grant No. 51277146)the Foundation of Delta Science,Technologythe Education Development Program for Power Electronics (Grant No. DREG2011003)
文摘By deriving the discrete-time models of a digitally controlled H-bridge inverter system modulated by bipolar sinu- soidal pulse width modulation （BSPWM） and unipolar double-frequency sinusoidal pulse width modulation （UDFSPWM） respectively, the performances of the two modulation strategies are analyzed in detail. The circuit parameters, used in this paper, are fixed. When the systems, modulated by BSPWM and UDFSPWM, have the same switching frequency, the stabil- ity boundaries of the two systems are the same. However, when the equivalent switching frequencies of the two systems are the same, the BSPWM modulated system is more stable than the UDFSPWM modulated system. In addition, a convenient method of establishing the discrete-time model of piecewise smooth system is presented. Finally, the analytical results are confirmed by circuit simulations and experimental measurements.
文摘This paper mainly concentrates on design of improved controller and its implementation based on single phase synchronous reference frame theory (SRFT) for Dynamic Voltage Restorer (DVR) compensating voltage sag particularly for nonlinear load. In case of single phase distribution line with nonlinear load, the complexity of controller’s design becomes more serious issue. The present single phase and/or three phase theories applicable to DVR shows poor response to restore voltage sag in case of nonlinear load due to presence of harmonics. Hence restoration of voltage sag in single phase nonlinear load connected system has been a serious concern. Therefore, new controller for DVR has been proposed incorporating effective design concept for fundamental component extraction in case of nonlinear load. The single phase SRFT based main controller for DVR works on two separate closed path viz. feed forward path for quick transient response and feedback path for reducing the steady state error. Moreover, pre-sag mitigation strategy of DVR has been adapted through these two aforementioned paths. Complete design of proposed controller is based on phasor analysis. It also consist of proportional integral (PI) controller to reduce the error in the DC-link voltage during compensation time. The controller performance has been verified in MATLAB Simulink for both types (linear and nonlinear) of load. The results obtained indicates that the proposed controller is effective in its performance.
文摘This paper deals with implementation of Sinusoidal Pulse-Width-Modulation (SPWM) for a single-phase hybrid power filter generator for Photovoltaic (PV) and wind grid applications. Using policy iteration algorithm, an improved variable step-size perturbation and observation algorithm is contrived and it is implemented proficiently using a hard-ware description language (VHDL) (Very High Speed Integrated Circuit Hardware Description Language). Subsequently, the new generated grid source supplements the existing grid power in rural houses during its cut off or restricted supply period. The software is used for generating SPWM modulation integrated with a solar-power & wind power grid system which is implemented on the Spartan 3 FPGA. The proposed algorithm performs as a conventional controller in terms of tracking speed and mitigating fluctuation output power in steady state operation which is shown in the experimental results with a commercial PV array and HPW (Height Weight Proportional) show. Simulation results demonstrate the validity with load of the proposed algorithm.
文摘Multilevel inverter (MLI) is one of the most efficient power converters which are especially suited for high power applications with reduced harmonics. MLI not only achieves high output power and is also used in renewable energy sources such as photovoltaic, wind and fuel cells. Among various topologies of MLI, this paper mainly focuses on cascaded MLI with three unequal DC sources called asymmetric cascaded MLI which reduces the number of power switches. Various modulation techniques are also reviewed in literature [1]. In this paper we focus on sinusoidal (or) multicarrier pulse width modulation (SPWM) which improves the output voltage at lower modulation index for obtaining lower Total Harmonic Distortion (THD) level. The gating signal for the 13-level hybrid inverter using SPWM technique is generated using Field Programmable Gate Array (FPGA) processor. The proposed modulation technique results in reduced percentage of THD, but lower order harmonics are not eliminated. So a new technique called Selective Harmonic Elimination (SHE) is also implemented in order to reduce the lower order harmonics. The optimum switching angles are determined for obtaining minimum THD. The performance evaluation of the proposed PWM inverter is verified using an experimental model of 13-level cascaded hybrid MLI and compared with MATLAB/SIMULINK model.
