A new non-inverting RC active differentiator network base on a current feedback amplifier and using a grounded capacitor is described. Small time constant can be achieved by adjusting a single grounded resistor. Becau...A new non-inverting RC active differentiator network base on a current feedback amplifier and using a grounded capacitor is described. Small time constant can be achieved by adjusting a single grounded resistor. Because the output impedance of the CFA is very low, the output terminal of the proposed circuit can be directly connected to the next stage. Experimental results that confirm theoretical analysis are presented.展开更多
One configuration for realizing voltage-mode multifunction filters and another configuration for realizing current-mode multifunction filters using current feedback amplifiers (CFAs) are presented. The proposed voltag...One configuration for realizing voltage-mode multifunction filters and another configuration for realizing current-mode multifunction filters using current feedback amplifiers (CFAs) are presented. The proposed voltage-mode circuit exhibit simultaneously lowpass and bandpass filters. The proposed current-mode circuit exhibit simultaneously lowpass, bandpass and highpass filters. The proposed circuits offer the following features: no requirements for component matching conditions;low active and passive sensitivities;employing only grounded capacitors and the ability to obtain multifunction filters from the same circuit configuration.展开更多
In the recent decade,different researchers have performed hardware implementation for different applications covering various areas of experts.In this research paper,a novel analog design and implementation of differe...In the recent decade,different researchers have performed hardware implementation for different applications covering various areas of experts.In this research paper,a novel analog design and implementation of different steps of fuzzy systems with current differencing buffered amplifier(CDBA)are proposed with a compact structure that can be used in many signal processing applications.The proposed circuits are capable of wide input current range,simple structure,and are highly linear.Different electrical parameters were compared for the proposed fuzzy system when using different membership functions.The novelty of this paper lies in the electronic implementation of different steps for realizing a fuzzy system using current amplifiers.When the power supply voltage of CDBA is 2V,it results in 155mW,power dissipation;4.615KΩ,input resistance;366KΩ,output resistances;and 189.09 dB,common-mode rejection ratio.A 155.519 dB,voltage gain,and 0.76V/μs,the slew rate is analyzed when the power supply voltage of CDBAis 3V.The fuzzy system is realized in 20nm CMOS technology and investigated with an output signal of high precision and high speed,illustrating that it is suitable for realtime applications.In this research paper,a consequence of feedback resistance on the adder circuit and the defuzzified circuit is also analyzed and the best results are obtained using 100K resistance.The structure has a low hardware complexity leading to a low delay and a rather high quality.展开更多
This paper presents two schemes of high performance CMOS current mirror, one of them is used for operational tran-sconductance amplifier (OTA) in analog VLSI systems. The linearity, output impedance, bandwidth and acc...This paper presents two schemes of high performance CMOS current mirror, one of them is used for operational tran-sconductance amplifier (OTA) in analog VLSI systems. The linearity, output impedance, bandwidth and accuracy are the most parameters to determine the performance of the current mirror. Here a comparison of two architectures based on same architecture of the amplifier is presented. This comparison includes: linearity, output impedance, bandwidth and accuracy. These two circuits are validated with simulation in technology AMS 0.35 μm. An operational amplifier based on the adapted current mirror is proposed. Its frequency analysis with large bandwidth is validated with the same technology.展开更多
This research paper contains a new electronically tunable current-mode biquadratic universal filter using a new active building block;current controlled differential difference current conveyor transconductance amplif...This research paper contains a new electronically tunable current-mode biquadratic universal filter using a new active building block;current controlled differential difference current conveyor transconductance amplifier (CCDDCCTA). The proposed filter provides the following important and desirable features: (i) One can use only one CCDDCCTA and two capacitors;(ii) One can get low pass (LP), band pass (BP), high pass (HP), notch (NF) and all pass (AP) current responses from the same configuration without any alteration;(iii) Passive components are grounded, which ease the integrated circuit implementation;(iv) Responses are electronically tunable;and (v) Sensitivity is low. Moreover, the non-ideality analysis shows that the parasitic passive components can be compensated for the proposed circuit. The functionality of the design is verified through SPICE simulations using 0.25 μm CMOS TSMC technology process parameters. Simulation result agrees well with the theoretical analysis.展开更多
A new circuit for realization of universal current-mode filter using current Follower Transconductance Amplifiers (CFTAs) is presented. The proposed circuit realizes current-mode low pass, high pass and band pass filt...A new circuit for realization of universal current-mode filter using current Follower Transconductance Amplifiers (CFTAs) is presented. The proposed circuit realizes current-mode low pass, high pass and band pass filter functions simultaneously with a single current source at the input. The band reject and all pass filters can also be obtained from the proposed circuit without any extra hardware. The proposed circuit employs three passive grounded elements and two CFTAs. Linear electronic control of natural frequency ω0 is available in the proposed circuit. The quality factor can be independently adjusted through grounded resistor. The proposed circuit employs two grounded capacitors and a grounded resistor along with two CFTAs. The grounded resistor can be replaced by an OTA based circuit for linear electronic control of quality factor Q0. The circuit exhibits low active and passive sensitivities for ω0 and Q0. Simulation results are obtained using PSPICE software which is in conformity with the theoretical findings.展开更多
To miniaturize a very low level dc current amplifier and to improve its output response speed, the switched capacitor negative feedback circuit (SCNF), instead of the conventionally used high-ohmage resistor, is prese...To miniaturize a very low level dc current amplifier and to improve its output response speed, the switched capacitor negative feedback circuit (SCNF), instead of the conventionally used high-ohmage resistor, is presented in this paper. In our system, a switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier using SCNF. The theoretical output voltage of the very low level dc current amplifier using SCNF is obtained. The experimental results show that the unnecessary components of the amplifier’s output are much decreased, and that the response speed of the amplifier with both the SCNF and SCF is faster than that using high-ohmage resistor.展开更多
This paper describes a very low level dc current amplifier using switched capacitor (SC) circuit to miniaturize and improve its output response speed, instead of the conventionally used high-oh-mage resistor. A switch...This paper describes a very low level dc current amplifier using switched capacitor (SC) circuit to miniaturize and improve its output response speed, instead of the conventionally used high-oh-mage resistor. A switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier. The simulation results show that the parasitic capacitances that are distributed to the input portion of the amplifier have some effect on offset voltage. From the experimental results, it is seen that the duty ratio of the clock cycle of SC circuit should be in the range from 0.05 to 0.70. It is suggested that the proposed very low level dc current amplifier using SC circuit is an effective way to obtain both a faster output response and its miniaturization.展开更多
A versatile current-mode biquadratic filter using three operational amplifiers and nine passive elements is proposed. By suitably choosing the output branch, lowpass, bandpass, highpass, bandstop and allpass transfer ...A versatile current-mode biquadratic filter using three operational amplifiers and nine passive elements is proposed. By suitably choosing the output branch, lowpass, bandpass, highpass, bandstop and allpass transfer functions are realized simultaneously without changing the circuit configuration and elements. Two circuits, one is for low frequency application and the other for high frequency, are proposed. The center frequency, quality factor and gain constants of the circuit can be tuned independently. Simulated results show that the circuits work successfully.展开更多
This paper proposes a new filter biquad circuit, which utilizes three Current Differencing Buffered Amplifiers (CDBA), two capacitors and five resistors, and operates in the trans-resistance mode. This multi-input and...This paper proposes a new filter biquad circuit, which utilizes three Current Differencing Buffered Amplifiers (CDBA), two capacitors and five resistors, and operates in the trans-resistance mode. This multi-input and single-output multifunction filter uses only grounded capacitors. All the employed resistors are either grounded or virtually grounded, which is an important parameter for its implementation as an integrated circuit. The circuit enjoys independent tunability of angular frequency and bandwidth. The 0.5 μm technology process parameters have been utilized to test and verify the performance characteristics of the circuit using PSPICE. The non-ideal analysis and sensitivity analysis, transient response, Monte-Carlo analysis and calculations of total harmonic distortion have also been shown.展开更多
With the large-signal model extracted from the InGaP/GaAs HBT with three fingers,a three-stage,class AB power amplifier at ISM band is designed.Through the optimization of the traditional bias network,the gain compres...With the large-signal model extracted from the InGaP/GaAs HBT with three fingers,a three-stage,class AB power amplifier at ISM band is designed.Through the optimization of the traditional bias network,the gain compression at the low input power level is eliminated successfully.At 3.5V of supply voltage of the power amplifier after optimization exhibits 30dBm of maximum linear output power,43.4% of power added efficiency 109.7mA of a quite low quiescent bias current ,29.1dB of the corresponding gain,and -100dBc of the adjacent channel power rejection (ACPR) at the output power of 30dBm.展开更多
A semiconductor optical amplifier gate based on tensile strained quasi bulk InGaAs is developed.At injection current of 80mA,a 3dB optical bandwidth of more than 85nm is achieved due to dominant band filling effect...A semiconductor optical amplifier gate based on tensile strained quasi bulk InGaAs is developed.At injection current of 80mA,a 3dB optical bandwidth of more than 85nm is achieved due to dominant band filling effect.Moreover,the most important is that very low polarization dependence of gain (<0 7dB),fiber to fiber lossless operation current (70～90mA) and a high extinction ratio (>50dB) are simultaneously obtained over this wide 3dB optical bandwidth (1520～1609nm) which nearly covers the spectral region of the whole C band (1525～1565nm) and the whole L band (1570～1610nm).The gating time is also improved by decreasing carrier lifetime.The wide band polarization insensitive SOA gate is promising for use in future dense wavelength division multiplexing (DWDM) communication systems.展开更多
Most modern microprocessors have one or two levels of on-chip caches to make things run faster,but this is not always the case.Most of the time,these caches are made of static random access memory cells.They take up a...Most modern microprocessors have one or two levels of on-chip caches to make things run faster,but this is not always the case.Most of the time,these caches are made of static random access memory cells.They take up a lot of space on the chip and use a lot of electricity.A lot of the time,low power is more important than several aspects.This is true for phones and tablets.Cache memory design for single bit architecture consists of six transistors static random access memory cell,a circuit of write driver,and sense amplifiers(such as voltage differential sense amplifier,current differential sense amplifier,charge transfer differential sense amplifier,voltage latch sense amplifier,and current latch sense amplifier,all of which are compared on different resistance values in terms of a number of transistors,delay in sensing and consumption of power.The conclusion arises that single bit six transistor static random access memory cell voltage differential sense amplifier architecture consumes 11.34μW of power which shows that power is reduced up to 83%,77.75%reduction in the case of the current differential sense amplifier,39.62%in case of charge transfer differential sense amplifier and 50%in case of voltage latch sense amplifier when compared to existing latch sense amplifier architecture.Furthermore,power reduction techniques are applied over different blocks of cache memory architecture to optimize energy.The single-bit six transistors static random access memory cell with forced tack technique and voltage differential sense amplifier with dual sleep technique consumes 8.078μW of power,i.e.,reduce 28%more power that makes single bit six transistor static random access memory cell with forced tack technique and voltage differential sense amplifier with dual sleep technique more energy efficient.展开更多
A double balanced Gilbert-cell class-A amplifier bleeding mixer (DBGC CAAB mixer) is proposed and implemented. The injection current is utilized to amplify the local oscillator (LO) signal to improve the performance o...A double balanced Gilbert-cell class-A amplifier bleeding mixer (DBGC CAAB mixer) is proposed and implemented. The injection current is utilized to amplify the local oscillator (LO) signal to improve the performance of the transconductor stage. The DBGC CAAB mixer achieves a conversion gain of 17.5 dB at -14 dBm LO power, and the noise figure is suppressed from 45 dB to 10.7 dB. It is important to stress that the new configuration will not drain additional power in contrast to the former current bleeding mixers. This topology dramatically relieves the requirement of the LO power. The DBGC CAAB mixer is implemented by using 0.18-μm RFCMOS technology and operates at the 2.4 GHz ISM application with 10 MHz intermediate frequency. The power consumption is 12 mA at 1.5 V supply voltage. The DBGC CAAB mixer features the highest FOM figure within a wide range of LO power.展开更多
Tow different computer calculation methods for distortion of the wide-band diode bridge track and hold amplifier (THA) are presented based on a high frequency Schottky diode model. One of the computer programs calcula...Tow different computer calculation methods for distortion of the wide-band diode bridge track and hold amplifier (THA) are presented based on a high frequency Schottky diode model. One of the computer programs calculates the distortion of weekly nonlinear THA based on the KCL and the nonlinear-current method. The other calculates the weekly nonlinear distortion by using a Volterra series method and a nodal formulation. Comparative calculation results for the diode bridge THA have shown good agreement with these two computer program calculation methods, whereas the overall computational efficiency of the nonlinear-current method is better than that of the nodal formulation method in a special evaluation.展开更多
Traveling Wave Tubes(TWTs) are widely used in the radar and communications system as RF power amplifiers. A highly sophisticated power supply is required by TWT. In order to meet the severe requirements of Traveling W...Traveling Wave Tubes(TWTs) are widely used in the radar and communications system as RF power amplifiers. A highly sophisticated power supply is required by TWT. In order to meet the severe requirements of Traveling Wave Tube Amplifier(TWTA), a novel two-stage topology high voltage converter for TWTA is proposed.The converter is based on Zero-Voltage Switching and Zero-Current Switching(ZVS/ZCS) resonant techniques. The high voltage converter operation principles are investigated and major features of the converter are discussed. The power switching mode of ZVS/ZCS is obtained. The experimental results show that the converter has good soft switching characteristics. Compared to the conventional hard switched Pulse Width Modulation(PWM) techniques, the high efficiency and low ripple of the converter for TWTA are realized. The efficiency of High Voltage Electronic Power Conditioners(HV-EPC) over 93.5% under the condition of 38~46 V input voltage and 260~300 W input power. The switching frequency of first-stage(preregulator) of HV-EPC is 89 k Hz and the switching frequency of second-stage(postregulator) is 44.5 k Hz. The highest output voltage of the HV-EPC is helix voltage which is about –6.8 kV. It is especially suitable for TWTA utilized in space satellite applications due to its high switching frequency and high power density.展开更多
A complementary metal-oxide-semiconductor transistor （CMOS） voltage-to-current（VTC）converter with high linearity for current-mode analog and digital integrated circuits is described. A high gain operational amplif...A complementary metal-oxide-semiconductor transistor （CMOS） voltage-to-current（VTC）converter with high linearity for current-mode analog and digital integrated circuits is described. A high gain operational amplifier （OPA） is utilized to form negative feedback. A proportional to absolute temperature （PTAT） current reference with transistors operated in a weak inversion is used as the bias circuit. The resistor and the OPA nonlinearity behavior are analyzed in detail. By optimizing parameters in OPA and adopting a small voltage coefficient polysilicon resistor as a linear device, a high linearity is achieved. The circuit is implemented in a standard 0. 6 μm CMOS technology. The low frequency gain of the OPA exceeds 90 dB. The test results indicate that the total harmonic distortion （THD）is 0. 000 2%. The common-mode input linearity range is 0 to 2. 6 V. Correspondingly, the output current range is 50 to 426μA. The sensitivity of the PTAT current reference to Vdd is approximately 0. 021 7. The chip consumes a power of less than 1.3 mW for a 5 V supply, and occupies an area of 0. 112 mm^2.展开更多
文摘A new non-inverting RC active differentiator network base on a current feedback amplifier and using a grounded capacitor is described. Small time constant can be achieved by adjusting a single grounded resistor. Because the output impedance of the CFA is very low, the output terminal of the proposed circuit can be directly connected to the next stage. Experimental results that confirm theoretical analysis are presented.
文摘One configuration for realizing voltage-mode multifunction filters and another configuration for realizing current-mode multifunction filters using current feedback amplifiers (CFAs) are presented. The proposed voltage-mode circuit exhibit simultaneously lowpass and bandpass filters. The proposed current-mode circuit exhibit simultaneously lowpass, bandpass and highpass filters. The proposed circuits offer the following features: no requirements for component matching conditions;low active and passive sensitivities;employing only grounded capacitors and the ability to obtain multifunction filters from the same circuit configuration.
文摘In the recent decade,different researchers have performed hardware implementation for different applications covering various areas of experts.In this research paper,a novel analog design and implementation of different steps of fuzzy systems with current differencing buffered amplifier(CDBA)are proposed with a compact structure that can be used in many signal processing applications.The proposed circuits are capable of wide input current range,simple structure,and are highly linear.Different electrical parameters were compared for the proposed fuzzy system when using different membership functions.The novelty of this paper lies in the electronic implementation of different steps for realizing a fuzzy system using current amplifiers.When the power supply voltage of CDBA is 2V,it results in 155mW,power dissipation;4.615KΩ,input resistance;366KΩ,output resistances;and 189.09 dB,common-mode rejection ratio.A 155.519 dB,voltage gain,and 0.76V/μs,the slew rate is analyzed when the power supply voltage of CDBAis 3V.The fuzzy system is realized in 20nm CMOS technology and investigated with an output signal of high precision and high speed,illustrating that it is suitable for realtime applications.In this research paper,a consequence of feedback resistance on the adder circuit and the defuzzified circuit is also analyzed and the best results are obtained using 100K resistance.The structure has a low hardware complexity leading to a low delay and a rather high quality.
文摘This paper presents two schemes of high performance CMOS current mirror, one of them is used for operational tran-sconductance amplifier (OTA) in analog VLSI systems. The linearity, output impedance, bandwidth and accuracy are the most parameters to determine the performance of the current mirror. Here a comparison of two architectures based on same architecture of the amplifier is presented. This comparison includes: linearity, output impedance, bandwidth and accuracy. These two circuits are validated with simulation in technology AMS 0.35 μm. An operational amplifier based on the adapted current mirror is proposed. Its frequency analysis with large bandwidth is validated with the same technology.
文摘This research paper contains a new electronically tunable current-mode biquadratic universal filter using a new active building block;current controlled differential difference current conveyor transconductance amplifier (CCDDCCTA). The proposed filter provides the following important and desirable features: (i) One can use only one CCDDCCTA and two capacitors;(ii) One can get low pass (LP), band pass (BP), high pass (HP), notch (NF) and all pass (AP) current responses from the same configuration without any alteration;(iii) Passive components are grounded, which ease the integrated circuit implementation;(iv) Responses are electronically tunable;and (v) Sensitivity is low. Moreover, the non-ideality analysis shows that the parasitic passive components can be compensated for the proposed circuit. The functionality of the design is verified through SPICE simulations using 0.25 μm CMOS TSMC technology process parameters. Simulation result agrees well with the theoretical analysis.
文摘A new circuit for realization of universal current-mode filter using current Follower Transconductance Amplifiers (CFTAs) is presented. The proposed circuit realizes current-mode low pass, high pass and band pass filter functions simultaneously with a single current source at the input. The band reject and all pass filters can also be obtained from the proposed circuit without any extra hardware. The proposed circuit employs three passive grounded elements and two CFTAs. Linear electronic control of natural frequency ω0 is available in the proposed circuit. The quality factor can be independently adjusted through grounded resistor. The proposed circuit employs two grounded capacitors and a grounded resistor along with two CFTAs. The grounded resistor can be replaced by an OTA based circuit for linear electronic control of quality factor Q0. The circuit exhibits low active and passive sensitivities for ω0 and Q0. Simulation results are obtained using PSPICE software which is in conformity with the theoretical findings.
文摘To miniaturize a very low level dc current amplifier and to improve its output response speed, the switched capacitor negative feedback circuit (SCNF), instead of the conventionally used high-ohmage resistor, is presented in this paper. In our system, a switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier using SCNF. The theoretical output voltage of the very low level dc current amplifier using SCNF is obtained. The experimental results show that the unnecessary components of the amplifier’s output are much decreased, and that the response speed of the amplifier with both the SCNF and SCF is faster than that using high-ohmage resistor.
文摘This paper describes a very low level dc current amplifier using switched capacitor (SC) circuit to miniaturize and improve its output response speed, instead of the conventionally used high-oh-mage resistor. A switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier. The simulation results show that the parasitic capacitances that are distributed to the input portion of the amplifier have some effect on offset voltage. From the experimental results, it is seen that the duty ratio of the clock cycle of SC circuit should be in the range from 0.05 to 0.70. It is suggested that the proposed very low level dc current amplifier using SC circuit is an effective way to obtain both a faster output response and its miniaturization.
文摘A versatile current-mode biquadratic filter using three operational amplifiers and nine passive elements is proposed. By suitably choosing the output branch, lowpass, bandpass, highpass, bandstop and allpass transfer functions are realized simultaneously without changing the circuit configuration and elements. Two circuits, one is for low frequency application and the other for high frequency, are proposed. The center frequency, quality factor and gain constants of the circuit can be tuned independently. Simulated results show that the circuits work successfully.
文摘This paper proposes a new filter biquad circuit, which utilizes three Current Differencing Buffered Amplifiers (CDBA), two capacitors and five resistors, and operates in the trans-resistance mode. This multi-input and single-output multifunction filter uses only grounded capacitors. All the employed resistors are either grounded or virtually grounded, which is an important parameter for its implementation as an integrated circuit. The circuit enjoys independent tunability of angular frequency and bandwidth. The 0.5 μm technology process parameters have been utilized to test and verify the performance characteristics of the circuit using PSPICE. The non-ideal analysis and sensitivity analysis, transient response, Monte-Carlo analysis and calculations of total harmonic distortion have also been shown.
文摘With the large-signal model extracted from the InGaP/GaAs HBT with three fingers,a three-stage,class AB power amplifier at ISM band is designed.Through the optimization of the traditional bias network,the gain compression at the low input power level is eliminated successfully.At 3.5V of supply voltage of the power amplifier after optimization exhibits 30dBm of maximum linear output power,43.4% of power added efficiency 109.7mA of a quite low quiescent bias current ,29.1dB of the corresponding gain,and -100dBc of the adjacent channel power rejection (ACPR) at the output power of 30dBm.
文摘A semiconductor optical amplifier gate based on tensile strained quasi bulk InGaAs is developed.At injection current of 80mA,a 3dB optical bandwidth of more than 85nm is achieved due to dominant band filling effect.Moreover,the most important is that very low polarization dependence of gain (<0 7dB),fiber to fiber lossless operation current (70～90mA) and a high extinction ratio (>50dB) are simultaneously obtained over this wide 3dB optical bandwidth (1520～1609nm) which nearly covers the spectral region of the whole C band (1525～1565nm) and the whole L band (1570～1610nm).The gating time is also improved by decreasing carrier lifetime.The wide band polarization insensitive SOA gate is promising for use in future dense wavelength division multiplexing (DWDM) communication systems.
基金Research General Direction funded this research at Universidad Santiago de Cali,Grant Number 01-2021 and APC was funded by 01-2021.
文摘Most modern microprocessors have one or two levels of on-chip caches to make things run faster,but this is not always the case.Most of the time,these caches are made of static random access memory cells.They take up a lot of space on the chip and use a lot of electricity.A lot of the time,low power is more important than several aspects.This is true for phones and tablets.Cache memory design for single bit architecture consists of six transistors static random access memory cell,a circuit of write driver,and sense amplifiers(such as voltage differential sense amplifier,current differential sense amplifier,charge transfer differential sense amplifier,voltage latch sense amplifier,and current latch sense amplifier,all of which are compared on different resistance values in terms of a number of transistors,delay in sensing and consumption of power.The conclusion arises that single bit six transistor static random access memory cell voltage differential sense amplifier architecture consumes 11.34μW of power which shows that power is reduced up to 83%,77.75%reduction in the case of the current differential sense amplifier,39.62%in case of charge transfer differential sense amplifier and 50%in case of voltage latch sense amplifier when compared to existing latch sense amplifier architecture.Furthermore,power reduction techniques are applied over different blocks of cache memory architecture to optimize energy.The single-bit six transistors static random access memory cell with forced tack technique and voltage differential sense amplifier with dual sleep technique consumes 8.078μW of power,i.e.,reduce 28%more power that makes single bit six transistor static random access memory cell with forced tack technique and voltage differential sense amplifier with dual sleep technique more energy efficient.
文摘A double balanced Gilbert-cell class-A amplifier bleeding mixer (DBGC CAAB mixer) is proposed and implemented. The injection current is utilized to amplify the local oscillator (LO) signal to improve the performance of the transconductor stage. The DBGC CAAB mixer achieves a conversion gain of 17.5 dB at -14 dBm LO power, and the noise figure is suppressed from 45 dB to 10.7 dB. It is important to stress that the new configuration will not drain additional power in contrast to the former current bleeding mixers. This topology dramatically relieves the requirement of the LO power. The DBGC CAAB mixer is implemented by using 0.18-μm RFCMOS technology and operates at the 2.4 GHz ISM application with 10 MHz intermediate frequency. The power consumption is 12 mA at 1.5 V supply voltage. The DBGC CAAB mixer features the highest FOM figure within a wide range of LO power.
文摘Tow different computer calculation methods for distortion of the wide-band diode bridge track and hold amplifier (THA) are presented based on a high frequency Schottky diode model. One of the computer programs calculates the distortion of weekly nonlinear THA based on the KCL and the nonlinear-current method. The other calculates the weekly nonlinear distortion by using a Volterra series method and a nodal formulation. Comparative calculation results for the diode bridge THA have shown good agreement with these two computer program calculation methods, whereas the overall computational efficiency of the nonlinear-current method is better than that of the nodal formulation method in a special evaluation.
文摘Traveling Wave Tubes(TWTs) are widely used in the radar and communications system as RF power amplifiers. A highly sophisticated power supply is required by TWT. In order to meet the severe requirements of Traveling Wave Tube Amplifier(TWTA), a novel two-stage topology high voltage converter for TWTA is proposed.The converter is based on Zero-Voltage Switching and Zero-Current Switching(ZVS/ZCS) resonant techniques. The high voltage converter operation principles are investigated and major features of the converter are discussed. The power switching mode of ZVS/ZCS is obtained. The experimental results show that the converter has good soft switching characteristics. Compared to the conventional hard switched Pulse Width Modulation(PWM) techniques, the high efficiency and low ripple of the converter for TWTA are realized. The efficiency of High Voltage Electronic Power Conditioners(HV-EPC) over 93.5% under the condition of 38~46 V input voltage and 260~300 W input power. The switching frequency of first-stage(preregulator) of HV-EPC is 89 k Hz and the switching frequency of second-stage(postregulator) is 44.5 k Hz. The highest output voltage of the HV-EPC is helix voltage which is about –6.8 kV. It is especially suitable for TWTA utilized in space satellite applications due to its high switching frequency and high power density.
文摘A complementary metal-oxide-semiconductor transistor （CMOS） voltage-to-current（VTC）converter with high linearity for current-mode analog and digital integrated circuits is described. A high gain operational amplifier （OPA） is utilized to form negative feedback. A proportional to absolute temperature （PTAT） current reference with transistors operated in a weak inversion is used as the bias circuit. The resistor and the OPA nonlinearity behavior are analyzed in detail. By optimizing parameters in OPA and adopting a small voltage coefficient polysilicon resistor as a linear device, a high linearity is achieved. The circuit is implemented in a standard 0. 6 μm CMOS technology. The low frequency gain of the OPA exceeds 90 dB. The test results indicate that the total harmonic distortion （THD）is 0. 000 2%. The common-mode input linearity range is 0 to 2. 6 V. Correspondingly, the output current range is 50 to 426μA. The sensitivity of the PTAT current reference to Vdd is approximately 0. 021 7. The chip consumes a power of less than 1.3 mW for a 5 V supply, and occupies an area of 0. 112 mm^2.
