Linear programming(LP)decoding is a classic decoding method for linear block codes,and has attracted recent researches because its potential in joint channel processing.However,for polar codes,LP decoders has long bee...Linear programming(LP)decoding is a classic decoding method for linear block codes,and has attracted recent researches because its potential in joint channel processing.However,for polar codes,LP decoders has long been outperformed by CRCaided successive cancellation list(CA-SCL)decoders.To increase the competitiveness of 5G NR LP polar decoding,it is possible to gain performance improvements by exploiting the cyclic redundancy check(CRC)setup.In this paper,we propose a combined scheme of reduced sparsified factor graph-sparsified CRC(RSFG-SCRC)and augmented generator matrix-CRC(AGM-CRC),for polytope generation in adaptive linear programming(ALP)decoder for 5G polar codes.Augmented generator matrix(AGM)polytope and improved maximum cycle strategy-auxiliary node pairs 4(MCS-ANP-4)algorithm are proposed,to make efficient use of CRC constraints and minimize the constraint size for the decoder.Numerical simulations show that adaptive linear programming decoders with our proposed RSFG-SCRC and AGM-CRC polytopes can achieve significantly better block error rate(BLER)performance than a benchmark CA-SCL-8 decoder especially in harsh low-to-medium SNR regions.展开更多
Decoding by alternating direction method of multipliers(ADMM) is a promising linear programming decoder for low-density parity-check(LDPC) codes. In this paper, we propose a two-step scheme to lower the error floor of...Decoding by alternating direction method of multipliers(ADMM) is a promising linear programming decoder for low-density parity-check(LDPC) codes. In this paper, we propose a two-step scheme to lower the error floor of LDPC codes with ADMM penalized decoder.For the undetected errors that cannot be avoided at the decoder side, we modify the code structure slightly to eliminate low-weight code words. For the detected errors induced by small error-prone structures, we propose a post-processing method for the ADMM penalized decoder. Simulation results show that the error floor can be reduced significantly over three illustrated LDPC codes by the proposed two-step scheme.展开更多
基金supported by China Postdoctoral Science Foundation(No.2020M670469)National Key Research and Development Program of China(No.2019YFB1803303,No.2020YFB1806702).
文摘Linear programming(LP)decoding is a classic decoding method for linear block codes,and has attracted recent researches because its potential in joint channel processing.However,for polar codes,LP decoders has long been outperformed by CRCaided successive cancellation list(CA-SCL)decoders.To increase the competitiveness of 5G NR LP polar decoding,it is possible to gain performance improvements by exploiting the cyclic redundancy check(CRC)setup.In this paper,we propose a combined scheme of reduced sparsified factor graph-sparsified CRC(RSFG-SCRC)and augmented generator matrix-CRC(AGM-CRC),for polytope generation in adaptive linear programming(ALP)decoder for 5G polar codes.Augmented generator matrix(AGM)polytope and improved maximum cycle strategy-auxiliary node pairs 4(MCS-ANP-4)algorithm are proposed,to make efficient use of CRC constraints and minimize the constraint size for the decoder.Numerical simulations show that adaptive linear programming decoders with our proposed RSFG-SCRC and AGM-CRC polytopes can achieve significantly better block error rate(BLER)performance than a benchmark CA-SCL-8 decoder especially in harsh low-to-medium SNR regions.
基金supported in part by National Nature Science Foundation of China under Grant No.61471286,No.61271004the Fundamental Research Funds for the Central Universitiesthe open research fund of Key Laboratory of Information Coding and Transmission,Southwest Jiaotong University(No.2010-03)
文摘Decoding by alternating direction method of multipliers(ADMM) is a promising linear programming decoder for low-density parity-check(LDPC) codes. In this paper, we propose a two-step scheme to lower the error floor of LDPC codes with ADMM penalized decoder.For the undetected errors that cannot be avoided at the decoder side, we modify the code structure slightly to eliminate low-weight code words. For the detected errors induced by small error-prone structures, we propose a post-processing method for the ADMM penalized decoder. Simulation results show that the error floor can be reduced significantly over three illustrated LDPC codes by the proposed two-step scheme.
