High-purity germanium(HPGe)detectors,which are used for direct dark matter detection,have the advantages of a low threshold and excellent energy resolution.The surface passivation of HPGe has become crucial for achiev...High-purity germanium(HPGe)detectors,which are used for direct dark matter detection,have the advantages of a low threshold and excellent energy resolution.The surface passivation of HPGe has become crucial for achieving an extremely low energy threshold.In this study,first-principles simulations,passivation film preparation,and metal oxide semiconductor(MOS)capacitor characterization were combined to study surface passivation.Theoretical calculations of the energy band structure of the -H,-OH,and -NH_(2) passivation groups on the surface of Ge were performed,and the interface state density and potential with five different passivation groups with N/O atomic ratios were accurately analyzed to obtain a stable surface state.Based on the theoretical calculation results,the surface passivation layers of the Ge_(2)ON_(2) film were prepared via magnetron sputtering in accordance with the optimum atomic ratio structure.The microstructure,C-V,and I-V electrical properties of the layers,and the passivation effect of the Al/Ge_(2)ON_(2)/Ge MOS were characterized to test the interface state density.The mean interface state density obtained by the Terman method was 8.4×10^(11) cm^(-2) eV^(-1).The processing of germanium oxynitrogen passivation films is expected to be used in direct dark matter detection of the HPGe detector surface passivation technology to reduce the detector leakage currents.展开更多
For the frequency range of I kHz-lOMHz, the interface state density of Ni contacts on p-GaN is studied using capacitance-voltage （C-V） and conductance-frequency-voltage （G-f-V） measurements at room temperature. To...For the frequency range of I kHz-lOMHz, the interface state density of Ni contacts on p-GaN is studied using capacitance-voltage （C-V） and conductance-frequency-voltage （G-f-V） measurements at room temperature. To obtain the real capacitance and interface state density of the Ni/p-GaN structures, the effects of the series resistance （Rs） on high-frequency （SMHz） capacitance values measured at a reverse and a forward bias are investigated. The mean interface state densities obtained from the CHF-CLF capacitance and the conductance method are 2 ×1012 e V-1 cm-2 and 0.94 × 1012 eV-1 cm-2, respectively. Furthermore, the interface state density derived from the conductance method is higher than that reported from the Ni/n-GaN in the literature, which is ascribed to a poor crystal quality and to a large defect density of the Mg-doped p-GaN.展开更多
The evaluation of the influence of the bending deformation of silicon nanobridges on their electrical properties is crucial for sensing and actuating applications. A combined theory/experimental approach for de- termi...The evaluation of the influence of the bending deformation of silicon nanobridges on their electrical properties is crucial for sensing and actuating applications. A combined theory/experimental approach for de- termining the resistivity and the density of interface states of the bending silicon nanobridges is presented. The suspended p-type silicon nanobridge test structures were fabricated from silicon-on-insulator wafers by using a standard CMOS lithography and anisotropic wet etching release process. After that, we measured the resistance of a set of silicon nanobridges versus their length and width under different bias voltages. In conjunction with a theoretical model, we have finally extracted both the interface state density of and resistivity suspended silicon nanobridges under different bending deformations, and found that the resistivity of silicon nanobridges without bending was 9.45 mΩ.cm and the corresponding interface charge density was around 1.7445 × 10^13 cm-2. The bending deformation due to the bias voltage slightly changed the resistivity of the silicon nanobridge, however, it significantly changed the distribution of interface state charges, which strongly depends on the intensity of the stress induced by bending deformation.展开更多
The dependences of Fermi-level pinning on interface state densities for the metal-dielectric, ploycrystalline silicon-dielectric, and metal silicide-dielectric interfaces are investigated by calculating their effectiv...The dependences of Fermi-level pinning on interface state densities for the metal-dielectric, ploycrystalline silicon-dielectric, and metal silicide-dielectric interfaces are investigated by calculating their effective work functions and their pinning factors. The Fermi-level pinning factors and effective work functions of the metal-dielectric interface are observed to be more susceptible to the increasing interface state densities, differing significantly from that of the ploycrystalline silicon-dielectric interface and the metal silicide-dielectric interface. The calculation results indicate that metal silicide gates with high-temperature resistance and low resistivity are a more promising choice for the design of gate materials in metal-oxide semiconductor（MOS） technology.展开更多
Intrinsic hydrogenated amorphous silicon（a-Si：H） film is deposited on n-type crystalline silicon（c-Si） wafer by hotwire chemical vapor deposition（HWCVD） to analyze the amorphous/crystalline heterointerface pass...Intrinsic hydrogenated amorphous silicon（a-Si：H） film is deposited on n-type crystalline silicon（c-Si） wafer by hotwire chemical vapor deposition（HWCVD） to analyze the amorphous/crystalline heterointerface passivation properties.The minority carrier lifetime of symmetric heterostructure is measured by using Sinton Consulting WCT-120 lifetime tester system,and a simple method of determining the interface state density（D_（it）） from lifetime measurement is proposed.The interface state density（D_（it）） measurement is also performed by using deep-level transient spectroscopy（DLTS） to prove the validity of the simple method.The microstructures and hydrogen bonding configurations of a-Si：H films with different hydrogen dilutions are investigated by using spectroscopic ellipsometry（SE） and Fourier transform infrared spectroscopy（FTIR） respectively.Lower values of interface state density（D_（it）） are obtained by using a-Si：H film with more uniform,compact microstructures and fewer bulk defects on crystalline silicon deposited by HWCVD.展开更多
In order to effectively remove the residual Ge atoms at the surface of channel and improve the interfacial characteristic of gate-all-around(GAA)Si nanosheet field effect transistors,a low-temperature atomic-level tri...In order to effectively remove the residual Ge atoms at the surface of channel and improve the interfacial characteristic of gate-all-around(GAA)Si nanosheet field effect transistors,a low-temperature atomic-level trimming approach using ammonia peroxide water mixture(APM)solution treatment followed by diluted hydrofluoric acid is proposed and carried out.The capacitor samples with SiGe epitaxy layer,similar thermal budget and channel release process were fabricated using advanced high-k/metal-gate.An 83%reduction in surface roughness at atomic level is obtained by increasing APM treatment time.Moreover,there are 99.45% reduction in the interface state density(D_(it))and 96.8%leakage reduction in current density(J_(g))after APM treatment,indicating a promising method for future GAA NSFET performance optimization.展开更多
In order to investigate the characteristics and mechanisms of subthreshold voltage hysteresis(ΔV_(th,sub)) of 4 H-SiC metal-oxide-semiconductor field-effect transistors(MOSFETs),4 H-SiC planar and trench MOSFETs and ...In order to investigate the characteristics and mechanisms of subthreshold voltage hysteresis(ΔV_(th,sub)) of 4 H-SiC metal-oxide-semiconductor field-effect transistors(MOSFETs),4 H-SiC planar and trench MOSFETs and corresponding P-type planar and trench metal-oxide-semiconductor(MOS) capacitors are fabricated and characterized.Compared with planar MOSFEF,the trench MOSFET shows hardly larger ΔV_(th,sub) in wide temperature range from 25 0 C to 300 0 C.When operating temperature range is from 25 ℃ to 300 ℃,the off-state negative V_(gs) of planar and trench MOSFETs should be safely above-4 V and-2 V,respectively,to alleviate the effect of ΔV_(th,sub) on the normal operation.With the help of P-type planar and trench MOS capacitors,it is confirmed that the obvious ΔV_(th,sub) of 4 H-SiC MOSFET originates from the high density of the hole interface traps between intrinsic Fermi energy level(E_(i)) and valence band(E_(v)).The maximumΔV_(th,sub) of trench MOSFET is about twelve times larger than that of planar MOSFET,owing to higher density of interface states(D_(it)) between E_(i) and E_(v).These research results will be very helpful for the application of 4 H-SiC MOSFET and the improvement of ΔV_(th,sub) of 4 H-SiC MOSFET,especially in 4 H-SiC trench MOSFET.展开更多
We investigate the effects of NO annealing and forming gas （FG） annealing on the electrical properties of a SiO2/SiC interface by low-temperature conductance measurements. With nitrogen passivation, the density of i...We investigate the effects of NO annealing and forming gas （FG） annealing on the electrical properties of a SiO2/SiC interface by low-temperature conductance measurements. With nitrogen passivation, the density of interface states （DIT） is significantly reduced in the entire energy range, and the shift of flatband voltage, AVFB, is effectively suppressed to less than 0.4 V. However, very fast states are observed after NO annealing and the response frequencies are higher than 1 MHz at room temperature. After additional FG annealing, the DIT and AVFB are further reduced. The values of the DIT decrease to less than 1011 cm-2 eV- 1 for the energy range of Ec - ET 〉/0.4 eV. It is suggested that the fast states in shallow energy levels originated from the N atoms accumulating at the interface by NO annealing. Though FG annealing has a limited effect on these shallow traps, hydrogen can terminate the residual Si and C dangling bonds corresponding to traps at deep energy levels and improve the interface quality further. It is indicated that NO annealing in conjunction with FG annealing will be a better post-oxidation process method for high performance SiC MOSFETs.展开更多
In this work,the electrical property of Au/graphene oxide/p-InP hetero-structure has been evaluated by 1-V and C-V measure-ments in dark and iluminated conditions(visible light).The diode exhibited significant rectify...In this work,the electrical property of Au/graphene oxide/p-InP hetero-structure has been evaluated by 1-V and C-V measure-ments in dark and iluminated conditions(visible light).The diode exhibited significant rectifying behavior,thus indicating the heterojunction-lype diode.The key electrical parameters of heterojunction diode including ideality factor(n),series resistance(R),shunt resistance(Rsh),and barrier height(Фb)are estimated from I-V data based on the theory of thermionic emission.The modifed Norde and Cheung's methods were utilized to evaluate the electrical parameters and compared the results.The current conduction mechanism at different voltage regions of I-V has also been investigated.The variation of 1/C versus voltage signifies linearity at high frequency(1 MHz),indicating that the type of heterojunction can be abrupt.The experimental outcomes of this study revealed that the performance of heterojunction diode in dark is considerably good as compared to the ilumination condition with respect to the lower values of Фp,n,R,and interface state density(Nss).展开更多
基金supported by the National Natural Science Foundation of China(No.12005017).
文摘High-purity germanium(HPGe)detectors,which are used for direct dark matter detection,have the advantages of a low threshold and excellent energy resolution.The surface passivation of HPGe has become crucial for achieving an extremely low energy threshold.In this study,first-principles simulations,passivation film preparation,and metal oxide semiconductor(MOS)capacitor characterization were combined to study surface passivation.Theoretical calculations of the energy band structure of the -H,-OH,and -NH_(2) passivation groups on the surface of Ge were performed,and the interface state density and potential with five different passivation groups with N/O atomic ratios were accurately analyzed to obtain a stable surface state.Based on the theoretical calculation results,the surface passivation layers of the Ge_(2)ON_(2) film were prepared via magnetron sputtering in accordance with the optimum atomic ratio structure.The microstructure,C-V,and I-V electrical properties of the layers,and the passivation effect of the Al/Ge_(2)ON_(2)/Ge MOS were characterized to test the interface state density.The mean interface state density obtained by the Terman method was 8.4×10^(11) cm^(-2) eV^(-1).The processing of germanium oxynitrogen passivation films is expected to be used in direct dark matter detection of the HPGe detector surface passivation technology to reduce the detector leakage currents.
基金Supported by the Natural Science Foundation of Jiangxi Province under Grant No 20133ACB20005the Key Program of National Natural Science Foundation of China under Grant No 41330318+3 种基金the Key Program of Science and Technology Research of Ministry of Education under Grant No NRE1515the Foundation of Training Academic and Technical Leaders for Main Majors of Jiangxi Province under Grant No 20142BCB22006the Research Foundation of Education Bureau of Jiangxi Province under Grant No GJJ14501the Engineering Research Center of Nuclear Technology Application(East China Institute of Technology)Ministry of Education under Grant NoHJSJYB2016-1
文摘For the frequency range of I kHz-lOMHz, the interface state density of Ni contacts on p-GaN is studied using capacitance-voltage （C-V） and conductance-frequency-voltage （G-f-V） measurements at room temperature. To obtain the real capacitance and interface state density of the Ni/p-GaN structures, the effects of the series resistance （Rs） on high-frequency （SMHz） capacitance values measured at a reverse and a forward bias are investigated. The mean interface state densities obtained from the CHF-CLF capacitance and the conductance method are 2 ×1012 e V-1 cm-2 and 0.94 × 1012 eV-1 cm-2, respectively. Furthermore, the interface state density derived from the conductance method is higher than that reported from the Ni/n-GaN in the literature, which is ascribed to a poor crystal quality and to a large defect density of the Mg-doped p-GaN.
基金supported by the National Natural Science Foundation of China(No.41075026)the Natural Science Foundation of Jiangsu Province (No.BK2012460)+2 种基金the Special Fund for Meteorology Research in the Public Interest(No.GYHY200906037)the Universities Natural Science Research Project of Jiangsu Province(No.12KJB510011)the Priority Academic Program Development of Sensor Networks and Modern Meteorological Equipment of Jiangsu Higher Education Institutions
文摘The evaluation of the influence of the bending deformation of silicon nanobridges on their electrical properties is crucial for sensing and actuating applications. A combined theory/experimental approach for de- termining the resistivity and the density of interface states of the bending silicon nanobridges is presented. The suspended p-type silicon nanobridge test structures were fabricated from silicon-on-insulator wafers by using a standard CMOS lithography and anisotropic wet etching release process. After that, we measured the resistance of a set of silicon nanobridges versus their length and width under different bias voltages. In conjunction with a theoretical model, we have finally extracted both the interface state density of and resistivity suspended silicon nanobridges under different bending deformations, and found that the resistivity of silicon nanobridges without bending was 9.45 mΩ.cm and the corresponding interface charge density was around 1.7445 × 10^13 cm-2. The bending deformation due to the bias voltage slightly changed the resistivity of the silicon nanobridge, however, it significantly changed the distribution of interface state charges, which strongly depends on the intensity of the stress induced by bending deformation.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61376096,61327813,and 11234007)
文摘The dependences of Fermi-level pinning on interface state densities for the metal-dielectric, ploycrystalline silicon-dielectric, and metal silicide-dielectric interfaces are investigated by calculating their effective work functions and their pinning factors. The Fermi-level pinning factors and effective work functions of the metal-dielectric interface are observed to be more susceptible to the increasing interface state densities, differing significantly from that of the ploycrystalline silicon-dielectric interface and the metal silicide-dielectric interface. The calculation results indicate that metal silicide gates with high-temperature resistance and low resistivity are a more promising choice for the design of gate materials in metal-oxide semiconductor（MOS） technology.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.51361022 and 61574072)the Postdoctoral Science Foundation of Jiangxi Province,China(Grant No.2015KY12)
文摘Intrinsic hydrogenated amorphous silicon（a-Si：H） film is deposited on n-type crystalline silicon（c-Si） wafer by hotwire chemical vapor deposition（HWCVD） to analyze the amorphous/crystalline heterointerface passivation properties.The minority carrier lifetime of symmetric heterostructure is measured by using Sinton Consulting WCT-120 lifetime tester system,and a simple method of determining the interface state density（D_（it）） from lifetime measurement is proposed.The interface state density（D_（it）） measurement is also performed by using deep-level transient spectroscopy（DLTS） to prove the validity of the simple method.The microstructures and hydrogen bonding configurations of a-Si：H films with different hydrogen dilutions are investigated by using spectroscopic ellipsometry（SE） and Fourier transform infrared spectroscopy（FTIR） respectively.Lower values of interface state density（D_（it）） are obtained by using a-Si：H film with more uniform,compact microstructures and fewer bulk defects on crystalline silicon deposited by HWCVD.
基金financially supported by the Strategic Pilot Project of the Chinese Academy of Sciences-Class A(No.XDA0330302)the National Natural Science Foundation of China(Nos.62374183 and 62304247)the 2021 Jilin Province Science and Technology Department Key R&D Projects(No.20210201031GX)。
文摘In order to effectively remove the residual Ge atoms at the surface of channel and improve the interfacial characteristic of gate-all-around(GAA)Si nanosheet field effect transistors,a low-temperature atomic-level trimming approach using ammonia peroxide water mixture(APM)solution treatment followed by diluted hydrofluoric acid is proposed and carried out.The capacitor samples with SiGe epitaxy layer,similar thermal budget and channel release process were fabricated using advanced high-k/metal-gate.An 83%reduction in surface roughness at atomic level is obtained by increasing APM treatment time.Moreover,there are 99.45% reduction in the interface state density(D_(it))and 96.8%leakage reduction in current density(J_(g))after APM treatment,indicating a promising method for future GAA NSFET performance optimization.
基金Project supported by the National Key Research and Development Program of China(Grant No.2017YFB0903203)the National Natural Science Foundation of China(Grant No.62004033)China Postdoctoral Science Foundation(Grant No.2020M683287)。
文摘In order to investigate the characteristics and mechanisms of subthreshold voltage hysteresis(ΔV_(th,sub)) of 4 H-SiC metal-oxide-semiconductor field-effect transistors(MOSFETs),4 H-SiC planar and trench MOSFETs and corresponding P-type planar and trench metal-oxide-semiconductor(MOS) capacitors are fabricated and characterized.Compared with planar MOSFEF,the trench MOSFET shows hardly larger ΔV_(th,sub) in wide temperature range from 25 0 C to 300 0 C.When operating temperature range is from 25 ℃ to 300 ℃,the off-state negative V_(gs) of planar and trench MOSFETs should be safely above-4 V and-2 V,respectively,to alleviate the effect of ΔV_(th,sub) on the normal operation.With the help of P-type planar and trench MOS capacitors,it is confirmed that the obvious ΔV_(th,sub) of 4 H-SiC MOSFET originates from the high density of the hole interface traps between intrinsic Fermi energy level(E_(i)) and valence band(E_(v)).The maximumΔV_(th,sub) of trench MOSFET is about twelve times larger than that of planar MOSFET,owing to higher density of interface states(D_(it)) between E_(i) and E_(v).These research results will be very helpful for the application of 4 H-SiC MOSFET and the improvement of ΔV_(th,sub) of 4 H-SiC MOSFET,especially in 4 H-SiC trench MOSFET.
基金supported by the National Natural Science Foundation of China(Nos.61106080,61275042)the National Science and Technology Major Project of the Ministry of Science and Technology of China(No.2013ZX02305)
文摘We investigate the effects of NO annealing and forming gas （FG） annealing on the electrical properties of a SiO2/SiC interface by low-temperature conductance measurements. With nitrogen passivation, the density of interface states （DIT） is significantly reduced in the entire energy range, and the shift of flatband voltage, AVFB, is effectively suppressed to less than 0.4 V. However, very fast states are observed after NO annealing and the response frequencies are higher than 1 MHz at room temperature. After additional FG annealing, the DIT and AVFB are further reduced. The values of the DIT decrease to less than 1011 cm-2 eV- 1 for the energy range of Ec - ET 〉/0.4 eV. It is suggested that the fast states in shallow energy levels originated from the N atoms accumulating at the interface by NO annealing. Though FG annealing has a limited effect on these shallow traps, hydrogen can terminate the residual Si and C dangling bonds corresponding to traps at deep energy levels and improve the interface quality further. It is indicated that NO annealing in conjunction with FG annealing will be a better post-oxidation process method for high performance SiC MOSFETs.
基金The authors would like to thank the National Science Fund for Excellent Young Scholars(51722509)National Key Research and Development Program of China(2017YFB1104700)+1 种基金Program for Science and Technology Innovation Group of Shaanxi Province(2019TD-011)Key Research and Development Program of Shaanxi Province(2020ZDLGY04-02)for support.
文摘In this work,the electrical property of Au/graphene oxide/p-InP hetero-structure has been evaluated by 1-V and C-V measure-ments in dark and iluminated conditions(visible light).The diode exhibited significant rectifying behavior,thus indicating the heterojunction-lype diode.The key electrical parameters of heterojunction diode including ideality factor(n),series resistance(R),shunt resistance(Rsh),and barrier height(Фb)are estimated from I-V data based on the theory of thermionic emission.The modifed Norde and Cheung's methods were utilized to evaluate the electrical parameters and compared the results.The current conduction mechanism at different voltage regions of I-V has also been investigated.The variation of 1/C versus voltage signifies linearity at high frequency(1 MHz),indicating that the type of heterojunction can be abrupt.The experimental outcomes of this study revealed that the performance of heterojunction diode in dark is considerably good as compared to the ilumination condition with respect to the lower values of Фp,n,R,and interface state density(Nss).
