A charge pump design is presented to operate at 10 kHz with 100 μA in a liquid crystal display (LCD) driver for cell phone. Optimal channel widths are designed by estimating the power consumption of the Fibonacci-lik...A charge pump design is presented to operate at 10 kHz with 100 μA in a liquid crystal display (LCD) driver for cell phone. Optimal channel widths are designed by estimating the power consumption of the Fibonacci-like charge pump. An optimal frequency is a compromise between the rise time and the dynamic power dissipation. The optimization of the two-phase nonoverlapping clock generator circuit improves the efficiency. Simulation results based on 1.2 μm complementary metal-oxide-semiconductor (CMOS) technology parameters verify the efficiency of the design.展开更多
To address the challenges of complexity,power consumption,and cost constraints in traditional display driver integrated circuits(DDICs)caused by external NOR Flash and SRAM,this work proposes an embedded resistive ran...To address the challenges of complexity,power consumption,and cost constraints in traditional display driver integrated circuits(DDICs)caused by external NOR Flash and SRAM,this work proposes an embedded resistive random-access memory(RRAM)integration solution based on a 40 nm high-voltage CMOS logic platform.Targeting the yield fluctuations and stability challenges during RRAM mass production,systematic process optimizations are implemented to achieve synergistic improvements in RRAM performance and yield.Through modifications to the film sputtering and pre-deposition treatment,the withinwafer resistance uniformity(RSU)of the oxygen-deficient layer(ODL)thin film is improved from 11%to 8%,while inter-wafer process stability variation reduces from 23%to below 6%.Consequently,the yield of 8 Mb RRAM embedded mass production products increases from 87%to 98.5%.In terms of device performance,the RRAM demonstrates a fast 4.8 ns read speed,exceptional read disturb immunity of 3×10^(8) cycles at 95℃,10^(3) write/erase endurance cycles for the 1 Mb cells,and data retention of 12.5 years at 125℃.Post high-temperature operating life(HTOL)testing exhibits stable high/low resistance window.This study provides process optimization strategies and a reliability assurance framework for the mass production of highly integrated,low-power embedded RRAM display driver IC.展开更多
文摘A charge pump design is presented to operate at 10 kHz with 100 μA in a liquid crystal display (LCD) driver for cell phone. Optimal channel widths are designed by estimating the power consumption of the Fibonacci-like charge pump. An optimal frequency is a compromise between the rise time and the dynamic power dissipation. The optimization of the two-phase nonoverlapping clock generator circuit improves the efficiency. Simulation results based on 1.2 μm complementary metal-oxide-semiconductor (CMOS) technology parameters verify the efficiency of the design.
文摘To address the challenges of complexity,power consumption,and cost constraints in traditional display driver integrated circuits(DDICs)caused by external NOR Flash and SRAM,this work proposes an embedded resistive random-access memory(RRAM)integration solution based on a 40 nm high-voltage CMOS logic platform.Targeting the yield fluctuations and stability challenges during RRAM mass production,systematic process optimizations are implemented to achieve synergistic improvements in RRAM performance and yield.Through modifications to the film sputtering and pre-deposition treatment,the withinwafer resistance uniformity(RSU)of the oxygen-deficient layer(ODL)thin film is improved from 11%to 8%,while inter-wafer process stability variation reduces from 23%to below 6%.Consequently,the yield of 8 Mb RRAM embedded mass production products increases from 87%to 98.5%.In terms of device performance,the RRAM demonstrates a fast 4.8 ns read speed,exceptional read disturb immunity of 3×10^(8) cycles at 95℃,10^(3) write/erase endurance cycles for the 1 Mb cells,and data retention of 12.5 years at 125℃.Post high-temperature operating life(HTOL)testing exhibits stable high/low resistance window.This study provides process optimization strategies and a reliability assurance framework for the mass production of highly integrated,low-power embedded RRAM display driver IC.
