The microRaman scattering of 4H-SiC films, fabricated by low pressure chemical vapor deposition under different growth conditions, is investigated at temperatures ranging from 80 K to 550K. The effects of growth condi...The microRaman scattering of 4H-SiC films, fabricated by low pressure chemical vapor deposition under different growth conditions, is investigated at temperatures ranging from 80 K to 550K. The effects of growth conditions on E2 （TO）, E1 （TO） and A1 （LO） phonon mode frequencies are negligible. The temperature dependences of phonon linewidth and lifetime of E2 （TO） modes are analyzed in terms of an anharmonic damping effect induced by thermal and growth conditions. The results show that the lifetime of E2 （TO） mode increases when the quality of the sample improves. Unlike other phone modes, Raman shift of A1 （longitudinal optical plasma coupling （LOPC）） mode does not decrease monotonously when the temperature increases, but tends to blueshift at low temperatures and to redshift at relatively high temperatures. Theoretical analyses are given for the abnormal phenomena of A1 （LOPC） mode in 4H-SiC.展开更多
Based on the charge storage mode,it is important to investigate the scaling dependence of memory performance in silicon nanocrystal（Si-NC） nonvolatile memory（NVM） devices for its scaling down limit.In this work,we...Based on the charge storage mode,it is important to investigate the scaling dependence of memory performance in silicon nanocrystal（Si-NC） nonvolatile memory（NVM） devices for its scaling down limit.In this work,we made eight kinds of test key cells with different gate widths and lengths by 0.13-μm node complementary metal oxide semiconductor（CMOS） technology.It is found that the memory windows of eight kinds of test key cells are almost the same of about1.64 V @ ±7 V/1 ms,which are independent of the gate area,but mainly determined by the average size（12 nm） and areal density（1.8×10^（11）/cm^2） of Si-NCs.The program/erase（P/E） speed characteristics are almost independent of gate widths and lengths.However,the erase speed is faster than the program speed of test key cells,which is due to the different charging behaviors between electrons and holes during the operation processes.Furthermore,the data retention characteristic is also independent of the gate area.Our findings are useful for further scaling down of Si-NC NVM devices to improve the performance and on-chip integration.展开更多
基金Supported by the National Natural Science Foundation of China under Grant Nos 61176085,11474365 and 61377055the Department of Education of Guangdong Province under Grant No gjhz1103the Open-Project Program of the State Key laboratory of Opto-Electronic Material and Technologies of Sun Yatsen University
文摘The microRaman scattering of 4H-SiC films, fabricated by low pressure chemical vapor deposition under different growth conditions, is investigated at temperatures ranging from 80 K to 550K. The effects of growth conditions on E2 （TO）, E1 （TO） and A1 （LO） phonon mode frequencies are negligible. The temperature dependences of phonon linewidth and lifetime of E2 （TO） modes are analyzed in terms of an anharmonic damping effect induced by thermal and growth conditions. The results show that the lifetime of E2 （TO） mode increases when the quality of the sample improves. Unlike other phone modes, Raman shift of A1 （longitudinal optical plasma coupling （LOPC）） mode does not decrease monotonously when the temperature increases, but tends to blueshift at low temperatures and to redshift at relatively high temperatures. Theoretical analyses are given for the abnormal phenomena of A1 （LOPC） mode in 4H-SiC.
基金Project supported by the State Key Development Program for Basic Research of China(Grant No.2010CB934402)the National Natural Science Foundation of China(Grant Nos.11374153,61571221,and 61071008)
文摘Based on the charge storage mode,it is important to investigate the scaling dependence of memory performance in silicon nanocrystal（Si-NC） nonvolatile memory（NVM） devices for its scaling down limit.In this work,we made eight kinds of test key cells with different gate widths and lengths by 0.13-μm node complementary metal oxide semiconductor（CMOS） technology.It is found that the memory windows of eight kinds of test key cells are almost the same of about1.64 V @ ±7 V/1 ms,which are independent of the gate area,but mainly determined by the average size（12 nm） and areal density（1.8×10^（11）/cm^2） of Si-NCs.The program/erase（P/E） speed characteristics are almost independent of gate widths and lengths.However,the erase speed is faster than the program speed of test key cells,which is due to the different charging behaviors between electrons and holes during the operation processes.Furthermore,the data retention characteristic is also independent of the gate area.Our findings are useful for further scaling down of Si-NC NVM devices to improve the performance and on-chip integration.
