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MODELS OF ASYNCHRONOUS MRALLEL NONLINEAR MULTISPLITTING RELAXED ITERATIONS 被引量:2
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作者 Z.Z. Bai(Institute of Computational Mathematics and Scientific/Engineering Computing,Chinese Academy of Sciences, Beijing, China)D.R. Wang(Depariment of Mathematics, Shanghai University of Science and Technology,Shanghai, China)D.J. Evans(Parallel Algorit 《Journal of Computational Mathematics》 SCIE CSCD 1995年第4期369-386,共18页
In the sense of the nonlinear multisplitting and based on the principle of suffi-ciently using the delayed information, we propose models of asynchronous parallelaccelerated overrelaxation iteration methods for solvin... In the sense of the nonlinear multisplitting and based on the principle of suffi-ciently using the delayed information, we propose models of asynchronous parallelaccelerated overrelaxation iteration methods for solving large scale system of non-linear equations. Under proper conditions, we set up the local convergence theoriesof these new method models. 展开更多
关键词 NoC Wang modelS OF asynchronous MRALLEL NONLINEAR MULTISPLITTING RELAXED ITERATIONS EN DCR
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Investigation of Asynchronous Pipeline Circuits Based on Bundled-Data Encoding: Implementation Styles, Behavioral Modeling,and Timing Analysis
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作者 Yu Zhou 《Tsinghua Science and Technology》 SCIE EI CAS CSCD 2022年第3期559-580,共22页
As VLSI technology enters the post-Moore era, there has been an increasing interest in asynchronous design because of its potential advantages in power consumption, electromagnetic emission, and automatic speed scalin... As VLSI technology enters the post-Moore era, there has been an increasing interest in asynchronous design because of its potential advantages in power consumption, electromagnetic emission, and automatic speed scaling capacity under supply voltage variations. In most practical asynchronous circuits, a pipeline forms the micro-architecture backbone, and its characteristics play a vital role in determining the overall circuit performance.In this paper, we investigate a series of typical asynchronous pipeline circuits based on bundled-data encoding,spanning different handshake signaling protocols such as 2-phase(micropipeline, Mousetrap, and Click), 4-phase(simple, semi-decoupled, and fully-decoupled), and single-track(GasP). An in-depth review of each selected circuit is conducted regarding the handshaking and data latching mechanisms behind the circuit implementations, as well as the analysis of its performance and timing constraints based on formal behavior models. Overall, this paper aims at providing a survey of asynchronous bundled-data pipeline circuits, and it will be a reference for designers interested in experimenting with asynchronous circuits. 展开更多
关键词 asynchronous pipeline circuits bundled-data encoding asynchronous circuit modeling
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