Doping in thin-film transistors(TFTs) plays a crucial role in tailoring material properties to enhance device performance, making them essential for advanced electronic applications. This study explores the synthesis ...Doping in thin-film transistors(TFTs) plays a crucial role in tailoring material properties to enhance device performance, making them essential for advanced electronic applications. This study explores the synthesis and characterization of TFTs fabricated using nickel(Ni)-doped indium oxide(In_(2)O_(3)) via a wet-chemical approach. The presented work investigates the effect of "Ni" incorporation in In_(2)O_(3) on the structural and electrical transport properties of In_(2)O_(3), revealing that higher "Ni" content decreases the oxygen vacancies, leading to a reduction in leakage current and a forward shift in threshold potential(V_(th)).Experimental findings reveal that Ni In O-based TFTs(with Ni = 0.5%) showcase enhanced electrical performance, achieving mobility of 7.54 cm^(2)/(V·s), an impressive ON/OFF current ratio of ~10^(7), a V_(th) of 6.26 V, reduced interfacial trap states(D_(it)) of 8.23 ×10^(12) cm^(-2) and enhanced biased stress stability. The efficacy of "Ni" incorporation is attributed to the upgraded Lewis acidity, stable Ni-O bond strength, and small ionic radius of Ni. Negative bias illumination stability(NBIS) measurements further indicate that device stability diminishes with shorter light wavelengths, likely due to the activation of oxygen vacancies. These findings validate the solution-processed techniques' potential for future large-scale, low-cost, energy-efficient, and high-performance electronics.展开更多
The fabrication of a dynamic threshold-2T0C(DT-2T0C) DRAM cell incorporating a ZnO charge-trap layer in the write transistor has been successfully achieved, addressing the negative hold voltage(V_(HOLD)) issue of conv...The fabrication of a dynamic threshold-2T0C(DT-2T0C) DRAM cell incorporating a ZnO charge-trap layer in the write transistor has been successfully achieved, addressing the negative hold voltage(V_(HOLD)) issue of conventional 2T0C DRAM cells using oxide channel layers. The proposed device facilitates dynamic modulation of turn-on voltage(V_(ON)) through an additional SET operation, allowing V_(ON) to shift above 0 V. The retention time in SET operation was extended to 10^(4) s by optimizing the tunneling layer deposition conditions. The device characterization revealed a significant correlation between V_(ON) and both the WRITE speed and the retention properties of the DT-2T0C, verifying the trade-off between WRITE time and retention time. A long retention time over 1000 s was achieved, even under VHOLD of 0 V.展开更多
基金funded by the research startup funding of National Research Foundation (NRF) of Korea through the Ministry of Science and ICT 2022R1G1A1009887Part of this study was supported by research start-up funding of Anhui University (S202418001/078)。
文摘Doping in thin-film transistors(TFTs) plays a crucial role in tailoring material properties to enhance device performance, making them essential for advanced electronic applications. This study explores the synthesis and characterization of TFTs fabricated using nickel(Ni)-doped indium oxide(In_(2)O_(3)) via a wet-chemical approach. The presented work investigates the effect of "Ni" incorporation in In_(2)O_(3) on the structural and electrical transport properties of In_(2)O_(3), revealing that higher "Ni" content decreases the oxygen vacancies, leading to a reduction in leakage current and a forward shift in threshold potential(V_(th)).Experimental findings reveal that Ni In O-based TFTs(with Ni = 0.5%) showcase enhanced electrical performance, achieving mobility of 7.54 cm^(2)/(V·s), an impressive ON/OFF current ratio of ~10^(7), a V_(th) of 6.26 V, reduced interfacial trap states(D_(it)) of 8.23 ×10^(12) cm^(-2) and enhanced biased stress stability. The efficacy of "Ni" incorporation is attributed to the upgraded Lewis acidity, stable Ni-O bond strength, and small ionic radius of Ni. Negative bias illumination stability(NBIS) measurements further indicate that device stability diminishes with shorter light wavelengths, likely due to the activation of oxygen vacancies. These findings validate the solution-processed techniques' potential for future large-scale, low-cost, energy-efficient, and high-performance electronics.
基金supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (RS-2024-00334190)。
文摘The fabrication of a dynamic threshold-2T0C(DT-2T0C) DRAM cell incorporating a ZnO charge-trap layer in the write transistor has been successfully achieved, addressing the negative hold voltage(V_(HOLD)) issue of conventional 2T0C DRAM cells using oxide channel layers. The proposed device facilitates dynamic modulation of turn-on voltage(V_(ON)) through an additional SET operation, allowing V_(ON) to shift above 0 V. The retention time in SET operation was extended to 10^(4) s by optimizing the tunneling layer deposition conditions. The device characterization revealed a significant correlation between V_(ON) and both the WRITE speed and the retention properties of the DT-2T0C, verifying the trade-off between WRITE time and retention time. A long retention time over 1000 s was achieved, even under VHOLD of 0 V.
