A 4H-SiC superjunction(SJ)MOSFET(SJMOS)with integrated high-K gate dielectric and split gate(HKSG-SJMOS)is proposed in this paper.The key features of HKSG-SJMOS involve the utilization of high-K(HK)dielectric as the g...A 4H-SiC superjunction(SJ)MOSFET(SJMOS)with integrated high-K gate dielectric and split gate(HKSG-SJMOS)is proposed in this paper.The key features of HKSG-SJMOS involve the utilization of high-K(HK)dielectric as the gate dielectric,which surrounds the source-connected split gate(SG)and metal gate.The high-K gate dielectric optimizes the electric field distribution within the drift region,creating a low-resistance conductive channel.This enhancement leads to an increase in the breakdown voltage(BV)and a reduction in the specific on resistance(R_(on,sp)).The introduction of split gate surrounded by high-K dielectric reduces the gate-drain capacitance(C_(gd))and gate-drain charge(Q_(gd)),which improves the switching characteristics.The simulation results indicate that compared to conventional 4H-SiC SJMOS,the HKSG-SJMOS exhibits a 110.5%enhancement in figure of merit(FOM,FOM=BV^(2)/R_(on,sp)),a 93.6%reduction in the high frequency figure of merit(HFFOM)of R_(on,sp)·C_(gd),and reductions in turn-on loss(E_(on))and turn-off loss(E_(off))by 38.3%and 31.6%,respectively.Furthermore,the reverse recovery characteristics of HKSG-SJMOS has also discussed,revealing superior performance compared to conventional 4H-SiC SJMOS.展开更多
A split gate MOSFET(SG-MOSFET)is widely known for reducing the reverse transfer capacitance(C_(RSS)).In a 3.3 kV class,the SG-MOSFET does not provide reliable operation due to the high gate oxide electric field.In add...A split gate MOSFET(SG-MOSFET)is widely known for reducing the reverse transfer capacitance(C_(RSS)).In a 3.3 kV class,the SG-MOSFET does not provide reliable operation due to the high gate oxide electric field.In addition to the poor static performance,the SG-MOSFET has issues such as the punch through and drain-induced barrier lowering(DIBL)caused by the high gate oxide electric field.As such,a 3.3 kV 4 H-SiC split gate MOSFET with a grounded central implant region(SG-CIMOSFET)is proposed to resolve these issues and for achieving a superior trade-off between the static and switching performance.The SG-CIMOSFET has a significantly low on-resistance(R_(ON))and maximum gate oxide field(E_(OX))due to the central implant region.A grounded central implant region significantly reduces the C_(RSS)and gate drain charge(Q_(GD))by partially screening the gate-to-drain capacitive coupling.Compared to a planar MOSFET,the SG MOSFET,central implant MOSFET(CIMOSFET),the SGCIMOSFET improve the R_(ON)×Q_(GD)by 83.7%,72.4%and 44.5%,respectively.The results show that the device features not only the smallest switching energy loss but also the fastest switching time.展开更多
An ultra-high voltage 4H-silicon carbide(Si C) gate turn-off(GTO) thyristor for low switching time is proposed and analyzed by numerical simulation. It features a double epitaxial p-base in which an extra electrical f...An ultra-high voltage 4H-silicon carbide(Si C) gate turn-off(GTO) thyristor for low switching time is proposed and analyzed by numerical simulation. It features a double epitaxial p-base in which an extra electrical field is induced to enhance the transportation of the electrons in the thin p-base and reduce recombination. As a result, the turn-on characteristics are improved. What is more, to obtain a low turn-off loss, an alternating p^+/n^+region formed in the backside acts as the anode in the GTO thyristor. Consequently, another path formed by the reverse-biased n^+–p junction accelerates the fast removal of excess electrons during turn-off. This work demonstrates that the turn-on time and turn-off time of the new structure are reduced to 37 ns and 783.1 ns, respectively, under a bus voltage of 8000 V and load current of 100 A/cm^2.展开更多
A 4H-silicon carbide metal-insulator-semiconductor structure with ultra-thin Al2O3 as the gate dielectric, deposited by atomic layer deposition on tile epitaxial layer of a 4H-SiC （0001） 80N-/N＋ substrate, has been...A 4H-silicon carbide metal-insulator-semiconductor structure with ultra-thin Al2O3 as the gate dielectric, deposited by atomic layer deposition on tile epitaxial layer of a 4H-SiC （0001） 80N-/N＋ substrate, has been fabricated. The experimental results indicate that the prepared ultra-thin Al2O3 gate dielectric exhibits good physical and electrical characteristics, including a high breakdown electrical field of 25 MV/cm, excellent interface properties （1 × 10^14 cm^-2） and low gate-leakage current （IG = 1 × 10^-3 A/cm 2@Eox = 8 MV/cm）. Analysis of the current conduction mecha- nism on the deposited Al2O3 gate dielectric was also systematically performed. The confirmed conduction mechanisms consisted of Fowler-Nordheim （FN） tuaneling, the Frenkel-Poole mechanism, direct tunneling and Schottky emission, and the dominant current conduction mechanism depends on the applied electrical field. When the gate leakage current mechanism is dominated by FN tunneling, the barrier height of SiC/Al2O3 is 1.4 eV, which can meet the requirements of silicon carbide metal-insulator-semiconductor transistor devices.展开更多
We study a series of（HfO2）x（Al2O3）1-x /4H-SiC MOS capacitors. It is shown that the conduction band offset of HfO2 is 0.5 e V and the conduction band offset of Hf AlO is 1.11–1.72 e V. The conduction band offsets...We study a series of（HfO2）x（Al2O3）1-x /4H-SiC MOS capacitors. It is shown that the conduction band offset of HfO2 is 0.5 e V and the conduction band offset of Hf AlO is 1.11–1.72 e V. The conduction band offsets of（Hf O2）x（Al2O3）1-x are increased with the increase of the Al composition, and the（HfO2）x（Al2O3）1-x offer acceptable barrier heights（〉 1 e V）for both electrons and holes. With a higher conduction band offset,（Hf O2）x（Al2O3）1-x/4H-SiC MOS capacitors result in a ～ 3 orders of magnitude lower gate leakage current at an effective electric field of 15 MV/cm and roughly the same effective breakdown field of ～ 25 MV/cm compared to HfO2. Considering the tradeoff among the band gap, the band offset, and the dielectric constant, we conclude that the optimum Al2O3 concentration is about 30% for an alternative gate dielectric in 4H-Si C power MOS-based transistors.展开更多
Metamaterials have exotic physical properties that rely on the construction of their underlying architecture.However,the physical properties of conventional mechanical metamaterials are permanently programmed into the...Metamaterials have exotic physical properties that rely on the construction of their underlying architecture.However,the physical properties of conventional mechanical metamaterials are permanently programmed into their periodic interconnect configurations,resulting in their lack of modularity,scalable fabrication,and programmability.Mechanical metamaterials typically exhibit a single extraordinary mechanical property or multiple extraordinary properties coupled together,making it difficult to realize multiple independent extraordinary mechanical properties.Here,the pixel mechanics metamaterials(PMMs)with multifunctional and reprogrammable properties are developed by arraying uncoupled constrained individual modular mechanics pixels(MPs).The MPs enable controlled conversion between two extraordinary mechanical properties(multistability and compression-torsion coupling deformation).Each MP exhibits 32 independent and reversible room temperature programming configurations.In addition,the programmability of metamaterials is further enhanced by shape memory polymer(SMP)and 4D printing,greatly enriching the design freedom.For the PMM consisting of m×n MPs,it has 32(m×n)independent room temperature programming configurations.The application prospects of metamaterials in the vibration isolation device and energy absorption device with programmable performance have been demonstrated.The vibration isolation frequencies of the MP before and after programming were[0 Hz-5.86 Hz],[0 Hz-13.67 Hz and 306.64 Hz-365.23 Hz].The total energy absorption of the developed PMM can be adjusted controllably in the range of 1.01 J-3.91 J.Six standard digital logic gates that do not require sustained external force are designed by controlling the closure between the modules.This design paradigm will facilitate the further development of multifunctional and reprogrammable metamaterials.展开更多
基金supported by the National Natural Science Foundation of China(Grant Nos.62074080 and U23B2042)in part by the Natural Science Foundation of Jiangsu Province(Grant No.BK20211104)in part by the Jiangsu Provincial Key Research and Development Program(Grant No.BE2022126)。
文摘A 4H-SiC superjunction(SJ)MOSFET(SJMOS)with integrated high-K gate dielectric and split gate(HKSG-SJMOS)is proposed in this paper.The key features of HKSG-SJMOS involve the utilization of high-K(HK)dielectric as the gate dielectric,which surrounds the source-connected split gate(SG)and metal gate.The high-K gate dielectric optimizes the electric field distribution within the drift region,creating a low-resistance conductive channel.This enhancement leads to an increase in the breakdown voltage(BV)and a reduction in the specific on resistance(R_(on,sp)).The introduction of split gate surrounded by high-K dielectric reduces the gate-drain capacitance(C_(gd))and gate-drain charge(Q_(gd)),which improves the switching characteristics.The simulation results indicate that compared to conventional 4H-SiC SJMOS,the HKSG-SJMOS exhibits a 110.5%enhancement in figure of merit(FOM,FOM=BV^(2)/R_(on,sp)),a 93.6%reduction in the high frequency figure of merit(HFFOM)of R_(on,sp)·C_(gd),and reductions in turn-on loss(E_(on))and turn-off loss(E_(off))by 38.3%and 31.6%,respectively.Furthermore,the reverse recovery characteristics of HKSG-SJMOS has also discussed,revealing superior performance compared to conventional 4H-SiC SJMOS.
基金supported by the MSIT(Ministry of Science and ICT),Korea,under the ITRC(Information Technology Research Center)support program(IITP-2020-2018-0-01421)supervised by the IITP(Institute for Information&communications Technology Promotion)then Samsung Electronics.
文摘A split gate MOSFET(SG-MOSFET)is widely known for reducing the reverse transfer capacitance(C_(RSS)).In a 3.3 kV class,the SG-MOSFET does not provide reliable operation due to the high gate oxide electric field.In addition to the poor static performance,the SG-MOSFET has issues such as the punch through and drain-induced barrier lowering(DIBL)caused by the high gate oxide electric field.As such,a 3.3 kV 4 H-SiC split gate MOSFET with a grounded central implant region(SG-CIMOSFET)is proposed to resolve these issues and for achieving a superior trade-off between the static and switching performance.The SG-CIMOSFET has a significantly low on-resistance(R_(ON))and maximum gate oxide field(E_(OX))due to the central implant region.A grounded central implant region significantly reduces the C_(RSS)and gate drain charge(Q_(GD))by partially screening the gate-to-drain capacitive coupling.Compared to a planar MOSFET,the SG MOSFET,central implant MOSFET(CIMOSFET),the SGCIMOSFET improve the R_(ON)×Q_(GD)by 83.7%,72.4%and 44.5%,respectively.The results show that the device features not only the smallest switching energy loss but also the fastest switching time.
基金Project supported by the National Natural Science Foundation of China(Grant No.51677149)
文摘An ultra-high voltage 4H-silicon carbide(Si C) gate turn-off(GTO) thyristor for low switching time is proposed and analyzed by numerical simulation. It features a double epitaxial p-base in which an extra electrical field is induced to enhance the transportation of the electrons in the thin p-base and reduce recombination. As a result, the turn-on characteristics are improved. What is more, to obtain a low turn-off loss, an alternating p^+/n^+region formed in the backside acts as the anode in the GTO thyristor. Consequently, another path formed by the reverse-biased n^+–p junction accelerates the fast removal of excess electrons during turn-off. This work demonstrates that the turn-on time and turn-off time of the new structure are reduced to 37 ns and 783.1 ns, respectively, under a bus voltage of 8000 V and load current of 100 A/cm^2.
基金supported by the 2010 School Fundamental Scientific Research Fund of Xidian University (Grant No. K50510250008)
文摘A 4H-silicon carbide metal-insulator-semiconductor structure with ultra-thin Al2O3 as the gate dielectric, deposited by atomic layer deposition on tile epitaxial layer of a 4H-SiC （0001） 80N-/N＋ substrate, has been fabricated. The experimental results indicate that the prepared ultra-thin Al2O3 gate dielectric exhibits good physical and electrical characteristics, including a high breakdown electrical field of 25 MV/cm, excellent interface properties （1 × 10^14 cm^-2） and low gate-leakage current （IG = 1 × 10^-3 A/cm 2@Eox = 8 MV/cm）. Analysis of the current conduction mecha- nism on the deposited Al2O3 gate dielectric was also systematically performed. The confirmed conduction mechanisms consisted of Fowler-Nordheim （FN） tuaneling, the Frenkel-Poole mechanism, direct tunneling and Schottky emission, and the dominant current conduction mechanism depends on the applied electrical field. When the gate leakage current mechanism is dominated by FN tunneling, the barrier height of SiC/Al2O3 is 1.4 eV, which can meet the requirements of silicon carbide metal-insulator-semiconductor transistor devices.
基金supported by the National Natural Science Foundation of China(Grant Nos.51272202 and 61234006)the Science Project of State Grid,China(Grant No.SGRI-WD-71-14-004)
文摘We study a series of（HfO2）x（Al2O3）1-x /4H-SiC MOS capacitors. It is shown that the conduction band offset of HfO2 is 0.5 e V and the conduction band offset of Hf AlO is 1.11–1.72 e V. The conduction band offsets of（Hf O2）x（Al2O3）1-x are increased with the increase of the Al composition, and the（HfO2）x（Al2O3）1-x offer acceptable barrier heights（〉 1 e V）for both electrons and holes. With a higher conduction band offset,（Hf O2）x（Al2O3）1-x/4H-SiC MOS capacitors result in a ～ 3 orders of magnitude lower gate leakage current at an effective electric field of 15 MV/cm and roughly the same effective breakdown field of ～ 25 MV/cm compared to HfO2. Considering the tradeoff among the band gap, the band offset, and the dielectric constant, we conclude that the optimum Al2O3 concentration is about 30% for an alternative gate dielectric in 4H-Si C power MOS-based transistors.
基金the financial support provided by the National Key R&D Program of China(2022YFB3805700)the National Natural Science Foundation of China(Grant Nos.12072094 and 12172106)+2 种基金the China Postdoctoral Science Foundation(Grant No.2023M730869)the Heilongjiang Natural Science Foundation Joint Guidance Project(Grant No.LH2023A004)the Postdoctoral Fellowship Program of CPSF(Grant No.GZB20230959)。
文摘Metamaterials have exotic physical properties that rely on the construction of their underlying architecture.However,the physical properties of conventional mechanical metamaterials are permanently programmed into their periodic interconnect configurations,resulting in their lack of modularity,scalable fabrication,and programmability.Mechanical metamaterials typically exhibit a single extraordinary mechanical property or multiple extraordinary properties coupled together,making it difficult to realize multiple independent extraordinary mechanical properties.Here,the pixel mechanics metamaterials(PMMs)with multifunctional and reprogrammable properties are developed by arraying uncoupled constrained individual modular mechanics pixels(MPs).The MPs enable controlled conversion between two extraordinary mechanical properties(multistability and compression-torsion coupling deformation).Each MP exhibits 32 independent and reversible room temperature programming configurations.In addition,the programmability of metamaterials is further enhanced by shape memory polymer(SMP)and 4D printing,greatly enriching the design freedom.For the PMM consisting of m×n MPs,it has 32(m×n)independent room temperature programming configurations.The application prospects of metamaterials in the vibration isolation device and energy absorption device with programmable performance have been demonstrated.The vibration isolation frequencies of the MP before and after programming were[0 Hz-5.86 Hz],[0 Hz-13.67 Hz and 306.64 Hz-365.23 Hz].The total energy absorption of the developed PMM can be adjusted controllably in the range of 1.01 J-3.91 J.Six standard digital logic gates that do not require sustained external force are designed by controlling the closure between the modules.This design paradigm will facilitate the further development of multifunctional and reprogrammable metamaterials.
