In the modern era of 5th generation(5G)networks,the data generated by User Equipments(UE)has increased significantly,with data file sizes varying from modest sensor logs to enormous multimedia files.In modern telecomm...In the modern era of 5th generation(5G)networks,the data generated by User Equipments(UE)has increased significantly,with data file sizes varying from modest sensor logs to enormous multimedia files.In modern telecommunications networks,the need for high-end security and efficient management of these large data files is a great challenge for network designers.The proposed model provides the efficient real-time virtual data storage of UE data files(light and heavy)using an object storage system MinIO having inbuilt Software Development Kits(SDKs)that are compatible with Amazon(S3)Application Program Interface(API)making operations like file uploading,and data retrieval extremely efficient as compared to legacy virtual storage system requiring low-level HTTP requests for data management.To provide integrity,authenticity,and confidentiality(integrity checking via an authentication tag)to the data files of UE,the encrypted algorithm 256-bit oriented-Advanced Encryption Standard(256-AES)in Galois/Counter Mode(GCM)is utilized in combination with MinIO.The AES-based MinIO signifies in more secure and faster approach than older models like Cipher Block Chaining(CBC).The performance of the proposed model is analyzed using the Iperf utility to perform the Teletraffic parametric(bandwidth,throughput,latency,and transmission delay)analysis for three different cases namely:(a)light UE traffic(uploading and retrieval)(b)heavy UE traffic(uploading and retrieval)and(c)comparison of Teletraffic parameters namely:bandwidth(Bava),throughput(Tput),data transfer(D_(Trans)),latency(L_(ms)),and transmission delay(TDelay)obtained from proposed method with legacy virtual storage methods.The results show that the suggested MinIO-based system outperforms conventional systems in terms of latency,encryption efficiency,and performance under varying data load conditions.展开更多
针对大数据传输中的数据机密性、完整性和数据丢失等问题,提出一种基于简化数据加密标准(Simplified Data Encryption Standard,SDES)和双轮差错控制的大数据集成安全系统。使用SDES加密算法生成加密字符串,并设计意外数据丢失备份系统...针对大数据传输中的数据机密性、完整性和数据丢失等问题,提出一种基于简化数据加密标准(Simplified Data Encryption Standard,SDES)和双轮差错控制的大数据集成安全系统。使用SDES加密算法生成加密字符串,并设计意外数据丢失备份系统以提高机密性和防止意外数据丢失。基于双轮差错控制以较低的空间开销控制传输过程中包含的任意数量的离散或连续错误位,基于固定长度编码(Fixed Length Coding,FLC)的无损压缩技术来减少数据开销。该算法具有较高的AE值、熵和压缩百分比,具有提供更高的数据机密性和完整性的潜力。展开更多
In cryptography, the Triple DES (3DES, TDES or officially TDEA) is a symmetric-key block cipher which applies the Data Encryption Standard (DES) cipher algorithm three times to each data block. Electronic payment syst...In cryptography, the Triple DES (3DES, TDES or officially TDEA) is a symmetric-key block cipher which applies the Data Encryption Standard (DES) cipher algorithm three times to each data block. Electronic payment systems are known to use the TDES scheme for the encryption/decryption of data, and hence faster implementations are of great significance. Field Programmable Gate Arrays (FPGAs) offer a new solution for optimizing the performance of applications meanwhile the Triple Data Encryption Standard (TDES) offers a mean to secure information. In this paper we present a pipelined implementation in VHDL, in Electronic Code Book (EBC) mode, of this commonly used cryptography scheme with aim to improve performance. We achieve a 48-stage pipeline depth by implementing a TDES key buffer and right rotations in the DES decryption key scheduler. Using the Altera Cyclone II FPGA as our platform, we design and verify the implementation with the EDA tools provided by Altera. We gather cost and throughput information from the synthesis and timing results and compare the performance of our design to common implementations presented in other literatures. Our design achieves a throughput of 3.2 Gbps with a 50 MHz clock;a performance increase of up to 16 times.展开更多
Encryption is used to secure sensitive computer data which may be at rest or in motion. There are several standard encryption algorithms that have been used to encrypt and protect blocks of sensitive data to ensure co...Encryption is used to secure sensitive computer data which may be at rest or in motion. There are several standard encryption algorithms that have been used to encrypt and protect blocks of sensitive data to ensure confidentiality. The most popular standard block encryption schemes are the Advanced Encryption Standard (AES), Triple Data Encryption Standard (3DES), and the first standardized encryption scheme, which is no longer the standard scheme now, namely the Data Encryption Standard (DES). AES is the current standard for block encryption used worldwide and is implemented on many processors. In this work, we compare the hardware performance of these three encryption schemes. First, we identified the underlying computational components for these three encryption schemes, and then we analyzed to what extent these computational components were being used in these block encryption schemes to encrypt and decrypt a given message. In this paper, we compared the contribution of these computational components to evaluate the overall encryption efficiency in terms of speed and computational delays for encrypting a given block of data for a given hardware platform. AES was found to be the faster scheme in terms of hardware computation speed in accomplishing the same encryption task compared to the other two block encryption schemes, namely, the DES and 3DES schemes.展开更多
文摘In the modern era of 5th generation(5G)networks,the data generated by User Equipments(UE)has increased significantly,with data file sizes varying from modest sensor logs to enormous multimedia files.In modern telecommunications networks,the need for high-end security and efficient management of these large data files is a great challenge for network designers.The proposed model provides the efficient real-time virtual data storage of UE data files(light and heavy)using an object storage system MinIO having inbuilt Software Development Kits(SDKs)that are compatible with Amazon(S3)Application Program Interface(API)making operations like file uploading,and data retrieval extremely efficient as compared to legacy virtual storage system requiring low-level HTTP requests for data management.To provide integrity,authenticity,and confidentiality(integrity checking via an authentication tag)to the data files of UE,the encrypted algorithm 256-bit oriented-Advanced Encryption Standard(256-AES)in Galois/Counter Mode(GCM)is utilized in combination with MinIO.The AES-based MinIO signifies in more secure and faster approach than older models like Cipher Block Chaining(CBC).The performance of the proposed model is analyzed using the Iperf utility to perform the Teletraffic parametric(bandwidth,throughput,latency,and transmission delay)analysis for three different cases namely:(a)light UE traffic(uploading and retrieval)(b)heavy UE traffic(uploading and retrieval)and(c)comparison of Teletraffic parameters namely:bandwidth(Bava),throughput(Tput),data transfer(D_(Trans)),latency(L_(ms)),and transmission delay(TDelay)obtained from proposed method with legacy virtual storage methods.The results show that the suggested MinIO-based system outperforms conventional systems in terms of latency,encryption efficiency,and performance under varying data load conditions.
文摘In cryptography, the Triple DES (3DES, TDES or officially TDEA) is a symmetric-key block cipher which applies the Data Encryption Standard (DES) cipher algorithm three times to each data block. Electronic payment systems are known to use the TDES scheme for the encryption/decryption of data, and hence faster implementations are of great significance. Field Programmable Gate Arrays (FPGAs) offer a new solution for optimizing the performance of applications meanwhile the Triple Data Encryption Standard (TDES) offers a mean to secure information. In this paper we present a pipelined implementation in VHDL, in Electronic Code Book (EBC) mode, of this commonly used cryptography scheme with aim to improve performance. We achieve a 48-stage pipeline depth by implementing a TDES key buffer and right rotations in the DES decryption key scheduler. Using the Altera Cyclone II FPGA as our platform, we design and verify the implementation with the EDA tools provided by Altera. We gather cost and throughput information from the synthesis and timing results and compare the performance of our design to common implementations presented in other literatures. Our design achieves a throughput of 3.2 Gbps with a 50 MHz clock;a performance increase of up to 16 times.
文摘Encryption is used to secure sensitive computer data which may be at rest or in motion. There are several standard encryption algorithms that have been used to encrypt and protect blocks of sensitive data to ensure confidentiality. The most popular standard block encryption schemes are the Advanced Encryption Standard (AES), Triple Data Encryption Standard (3DES), and the first standardized encryption scheme, which is no longer the standard scheme now, namely the Data Encryption Standard (DES). AES is the current standard for block encryption used worldwide and is implemented on many processors. In this work, we compare the hardware performance of these three encryption schemes. First, we identified the underlying computational components for these three encryption schemes, and then we analyzed to what extent these computational components were being used in these block encryption schemes to encrypt and decrypt a given message. In this paper, we compared the contribution of these computational components to evaluate the overall encryption efficiency in terms of speed and computational delays for encrypting a given block of data for a given hardware platform. AES was found to be the faster scheme in terms of hardware computation speed in accomplishing the same encryption task compared to the other two block encryption schemes, namely, the DES and 3DES schemes.
