Inspired by the design philosophy of information metasurfaces based on the digital coding concept,a planar 4-bit reconfigurable antenna array with low profile of 0.15λ0(whereλ0is the free-space wavelength)is present...Inspired by the design philosophy of information metasurfaces based on the digital coding concept,a planar 4-bit reconfigurable antenna array with low profile of 0.15λ0(whereλ0is the free-space wavelength)is presented.The array is based on a digital coding radiation element consisting of a 1-bit magnetoelectric(ME)dipole and a miniaturized reflection-type phase shifter(RTPS).The proposed 1-bit ME dipole can provide two digital states of"0"and"1"(with 0°and 180°phase responses)over a wide frequency band by individually exciting its two symmetrical feeding ports.The designed RTPS is able to realize a relative phase shift of 173°.By digitally quantizing its phase in the range of 157.5°,additional eight digital states at intervals of 22.5°are obtained.To achieve low sidelobe levels,a 1:16 power divider based on the Taylor line source method is employed to feed the array,A prototype of the proposed 4-bit antenna array has been fabricated and tested,and the experimental results are in good agreement with the simulations.Scanning beams within a±45°range were measured with a maximum realized gain of 13.4 dBi at12 GHz.The sidelobe and cross-polarization levels are below-14.3 and-23.0 dB,respectively.Furthermore,the beam pointing error is within 0.8°,and the 3 dB gain bandwidth of the broadside beam is 25%.Due to its outstanding performance,the array holds potential for significant applications in radar and wireless communication systems.展开更多
This paper presents a 1.2 V high accuracy thermal sensor analog front-end circuit with 7 probes placed around the microprocessor chip.This analog front-end consists of a BGR(bandgap reference),a DEM(dynamic element ma...This paper presents a 1.2 V high accuracy thermal sensor analog front-end circuit with 7 probes placed around the microprocessor chip.This analog front-end consists of a BGR(bandgap reference),a DEM(dynamic element matching)control,and probes.The BGR generates the voltages linear changed with temperature,which are followed by the data read out circuits.The superior accuracy of the BGR’s output voltage is a key factor for sensors fabricated via the FinFET digital process.Here,a 4-stage folded current bias structure is proposed,to increase DC accuracy and confer immunity against FinFET process variation due to limited device length and low current bias.At the same time,DEM is also adopted,so as to filter out current branch mismatches.Having been fabricated via a 12 nm FinFET CMOS process,200 chips were tested.The measurement results demonstrate that these analog front-end circuits can work steadily below 1.2 V,and a less than 3.1%3σ-accuracy level is achieved.Temperature stability is 0.088 mV/℃across a range from-40 to 130℃.展开更多
Multi-precision multiplication and squaring are the performance-critical operations for the implementation of public-key cryptography, such as exponentiation in RSA, and scalar multiplication in elliptic curve cryptog...Multi-precision multiplication and squaring are the performance-critical operations for the implementation of public-key cryptography, such as exponentiation in RSA, and scalar multiplication in elliptic curve cryptography （ECC）. In this paper, we provide a survey on the multi-precision multiplication and squaring techniques, and make special focus on the comparison of their performance and memory footprint on sensor nodes using 8-bit processors, Different from the previous work, our advantages are in at least three aspects. Firstly, this survey includes the existing techniques for multi- precision multiplication and squaring on sensor nodes over prime fields. Secondly, we analyze and evaluate each method in a systematic and objective way. Thirdly, this survey also provides suggestions for selecting appropriate multiplication and squaring techniques for concrete implementation of public-key cryptography. At the end of this survey, we propose the research challenges on efficient implementation of the multiplication and the squaring operations based on our observation.展开更多
基金supported in part by the National Key Research and Development Program of China(2017YFA0700201,2017YFA0700202,and 2017YFA0700203)the National Natural Science Foundation of China(61631007,61571117,61138001,61371035,61722106,61731010,11227904,and 62171124)+1 种基金the 111 Project(111-2-05)the Scientific Research Foundation of Graduate School of Southeast University(YBYP2119)。
文摘Inspired by the design philosophy of information metasurfaces based on the digital coding concept,a planar 4-bit reconfigurable antenna array with low profile of 0.15λ0(whereλ0is the free-space wavelength)is presented.The array is based on a digital coding radiation element consisting of a 1-bit magnetoelectric(ME)dipole and a miniaturized reflection-type phase shifter(RTPS).The proposed 1-bit ME dipole can provide two digital states of"0"and"1"(with 0°and 180°phase responses)over a wide frequency band by individually exciting its two symmetrical feeding ports.The designed RTPS is able to realize a relative phase shift of 173°.By digitally quantizing its phase in the range of 157.5°,additional eight digital states at intervals of 22.5°are obtained.To achieve low sidelobe levels,a 1:16 power divider based on the Taylor line source method is employed to feed the array,A prototype of the proposed 4-bit antenna array has been fabricated and tested,and the experimental results are in good agreement with the simulations.Scanning beams within a±45°range were measured with a maximum realized gain of 13.4 dBi at12 GHz.The sidelobe and cross-polarization levels are below-14.3 and-23.0 dB,respectively.Furthermore,the beam pointing error is within 0.8°,and the 3 dB gain bandwidth of the broadside beam is 25%.Due to its outstanding performance,the array holds potential for significant applications in radar and wireless communication systems.
基金This work was supported by the National Natural Science Foundation of China(No.61432016 and No.61521092)the Key Program of the Chinese Academy of Sciences(ZDRWXH-2017-1)the Strategic Priority Research Program of the Chinese Academy of Sciences(No.XDC05020000).
文摘This paper presents a 1.2 V high accuracy thermal sensor analog front-end circuit with 7 probes placed around the microprocessor chip.This analog front-end consists of a BGR(bandgap reference),a DEM(dynamic element matching)control,and probes.The BGR generates the voltages linear changed with temperature,which are followed by the data read out circuits.The superior accuracy of the BGR’s output voltage is a key factor for sensors fabricated via the FinFET digital process.Here,a 4-stage folded current bias structure is proposed,to increase DC accuracy and confer immunity against FinFET process variation due to limited device length and low current bias.At the same time,DEM is also adopted,so as to filter out current branch mismatches.Having been fabricated via a 12 nm FinFET CMOS process,200 chips were tested.The measurement results demonstrate that these analog front-end circuits can work steadily below 1.2 V,and a less than 3.1%3σ-accuracy level is achieved.Temperature stability is 0.088 mV/℃across a range from-40 to 130℃.
文摘Multi-precision multiplication and squaring are the performance-critical operations for the implementation of public-key cryptography, such as exponentiation in RSA, and scalar multiplication in elliptic curve cryptography （ECC）. In this paper, we provide a survey on the multi-precision multiplication and squaring techniques, and make special focus on the comparison of their performance and memory footprint on sensor nodes using 8-bit processors, Different from the previous work, our advantages are in at least three aspects. Firstly, this survey includes the existing techniques for multi- precision multiplication and squaring on sensor nodes over prime fields. Secondly, we analyze and evaluate each method in a systematic and objective way. Thirdly, this survey also provides suggestions for selecting appropriate multiplication and squaring techniques for concrete implementation of public-key cryptography. At the end of this survey, we propose the research challenges on efficient implementation of the multiplication and the squaring operations based on our observation.
