In this study,with the aim of achieving a high signal-to-noise ratio(SNR)in an electron-bombarded complementary metal-oxide-semiconductor(EBCMOS)imaging chip,we analyzed the sources of noise using principles from low-...In this study,with the aim of achieving a high signal-to-noise ratio(SNR)in an electron-bombarded complementary metal-oxide-semiconductor(EBCMOS)imaging chip,we analyzed the sources of noise using principles from low-light-level imaging and semiconductor theory,and established a physical computational model that relates the electron-multiplication layer to the noise characteristics of an EBCMOS chip in a uniformly doped structure with a P-type substrate.We conducted theoretical calculations to analyze the effects on noise characteristics of the passivation layer material and thickness,P-substrate doping concentration,P-substrate thickness,incident electron energy,and substrate temperature.By comparing the characteristics of pixel noise,dark current,multiplication electron numbers,and SNR under various structures,we simulated optimized structural parameters of the device.Our simulation results showed that the noise characteristics of the device could be optimized using an Al_(2)O_(3)passivation thickness of 15 nm and substrate temperature of 260 K,and by decreasing the doping concentration and thickness of the P-type substrate and increasing the incident electron energy.The optimized SNR were 252 e/e.And the substantial impact of dark current noise,primarily governed by interfacial defects,on the overall noise characteristics of the device.This research offers theoretical support to develop EBCMOS imaging chips with high gain and SNR.展开更多
Neuromorphic devices have garnered significant attention as potential building blocks for energy-efficient hardware systems owing to their capacity to emulate the computational efficiency of the brain.In this regard,r...Neuromorphic devices have garnered significant attention as potential building blocks for energy-efficient hardware systems owing to their capacity to emulate the computational efficiency of the brain.In this regard,reservoir computing(RC)framework,which leverages straightforward training methods and efficient temporal signal processing,has emerged as a promising scheme.While various physical reservoir devices,including ferroelectric,optoelectronic,and memristor-based systems,have been demonstrated,many still face challenges related to compatibility with mainstream complementary metal oxide semiconductor(CMOS)integration processes.This study introduced a silicon-based schottky barrier metal-oxide-semiconductor field effect transistor(SB-MOSFET),which was fabricated under low thermal budget and compatible with back-end-of-line(BEOL).The device demonstrated short-term memory characteristics,facilitated by the modulation of schottky barriers and charge trapping.Utilizing these characteristics,a RC system for temporal data processing was constructed,and its performance was validated in a 5×4 digital classification task,achieving an accuracy exceeding 98%after 50 training epochs.Furthermore,the system successfully processed temporal signal in waveform classification and prediction tasks using time-division multiplexing.Overall,the SB-MOSFET's high compatibility with CMOS technology provides substantial advantages for large-scale integration,enabling the development of energy-efficient reservoir computing hardware.展开更多
文摘In this study,with the aim of achieving a high signal-to-noise ratio(SNR)in an electron-bombarded complementary metal-oxide-semiconductor(EBCMOS)imaging chip,we analyzed the sources of noise using principles from low-light-level imaging and semiconductor theory,and established a physical computational model that relates the electron-multiplication layer to the noise characteristics of an EBCMOS chip in a uniformly doped structure with a P-type substrate.We conducted theoretical calculations to analyze the effects on noise characteristics of the passivation layer material and thickness,P-substrate doping concentration,P-substrate thickness,incident electron energy,and substrate temperature.By comparing the characteristics of pixel noise,dark current,multiplication electron numbers,and SNR under various structures,we simulated optimized structural parameters of the device.Our simulation results showed that the noise characteristics of the device could be optimized using an Al_(2)O_(3)passivation thickness of 15 nm and substrate temperature of 260 K,and by decreasing the doping concentration and thickness of the P-type substrate and increasing the incident electron energy.The optimized SNR were 252 e/e.And the substantial impact of dark current noise,primarily governed by interfacial defects,on the overall noise characteristics of the device.This research offers theoretical support to develop EBCMOS imaging chips with high gain and SNR.
基金supported in part by the Chinese Academy of Sciences(No.XDA0330302)NSFC program(No.22127901)。
文摘Neuromorphic devices have garnered significant attention as potential building blocks for energy-efficient hardware systems owing to their capacity to emulate the computational efficiency of the brain.In this regard,reservoir computing(RC)framework,which leverages straightforward training methods and efficient temporal signal processing,has emerged as a promising scheme.While various physical reservoir devices,including ferroelectric,optoelectronic,and memristor-based systems,have been demonstrated,many still face challenges related to compatibility with mainstream complementary metal oxide semiconductor(CMOS)integration processes.This study introduced a silicon-based schottky barrier metal-oxide-semiconductor field effect transistor(SB-MOSFET),which was fabricated under low thermal budget and compatible with back-end-of-line(BEOL).The device demonstrated short-term memory characteristics,facilitated by the modulation of schottky barriers and charge trapping.Utilizing these characteristics,a RC system for temporal data processing was constructed,and its performance was validated in a 5×4 digital classification task,achieving an accuracy exceeding 98%after 50 training epochs.Furthermore,the system successfully processed temporal signal in waveform classification and prediction tasks using time-division multiplexing.Overall,the SB-MOSFET's high compatibility with CMOS technology provides substantial advantages for large-scale integration,enabling the development of energy-efficient reservoir computing hardware.
