"Factory physics principles" provided a method to evaluate the performance of a simple production line, whose fundamental parameters are known or given. However, it is difficult to obtain the exact and reaso..."Factory physics principles" provided a method to evaluate the performance of a simple production line, whose fundamental parameters are known or given. However, it is difficult to obtain the exact and reasonable parameters in actual manufacturing environment, especially for the complex chipset assembly & test production line(CATPL). Besides, research in this field tends to focus on evaluation and improvement of CATPL without considering performance interval and status with variability level. A developed internal benchmark method is proposed, which established three-parameter method based on the Little′s law. It integrates the variability factors, such as processing time, random failure time, and random repair time, to meet performance evaluation and improvement. A case study in a chipset assembly and test factory for the performance of CATPL is implemented. The results demonstrate the potential of the proposed method to meet performance evaluation and emphasise its relevance for practical applications.展开更多
基金supported by National Natural Science Foundation of China (No. 71671026)Sichuan Science and Technology Program (Nos. 2018GZ0306 and 2017GZ0034)
文摘"Factory physics principles" provided a method to evaluate the performance of a simple production line, whose fundamental parameters are known or given. However, it is difficult to obtain the exact and reasonable parameters in actual manufacturing environment, especially for the complex chipset assembly & test production line(CATPL). Besides, research in this field tends to focus on evaluation and improvement of CATPL without considering performance interval and status with variability level. A developed internal benchmark method is proposed, which established three-parameter method based on the Little′s law. It integrates the variability factors, such as processing time, random failure time, and random repair time, to meet performance evaluation and improvement. A case study in a chipset assembly and test factory for the performance of CATPL is implemented. The results demonstrate the potential of the proposed method to meet performance evaluation and emphasise its relevance for practical applications.
