A minority carrier lifetime of 25.46 μs in a P-type 4H-SiC epilayer has been attained through sequential thermal oxidation and hydrogen annealing. Thermal oxidation can enhance the minority carrier lifetime in the 4H...A minority carrier lifetime of 25.46 μs in a P-type 4H-SiC epilayer has been attained through sequential thermal oxidation and hydrogen annealing. Thermal oxidation can enhance the minority carrier lifetime in the 4H-SiC epilayer by reducing carbon vacancies. However, this process also generates carbon clusters with limited diffusivity and contributes to the enlargement of surface pits on the 4H-SiC. High-temperature hydrogen annealing effectively reduces stacking fault and dislocation density. Moreover, electron spin resonance analysis indicates a significant reduction in carbon vacancy defects after hydrogen annealing. The mechanisms of the elimination of carbon vacancies by hydrogen annealing include the decomposition of carbon clusters formed during thermal oxidation and the low-pressure selective etching by hydrogen,which increases the carbon content on the 4H-SiC surface and facilitates carbon diffusion. Consequently, the combination of thermal oxidation and hydrogen annealing eliminates carbon vacancies more effectively, substantially enhancing the minority carrier lifetime in P-type 4H-SiC. This improvement is advantageous for the application of high-voltage SiC bipolar devices.展开更多
A 4H-SiC trench gate metal-oxide-semiconductor field-effect transistor(UMOSFET)with semi-super-junction shiel-ded structure(SS-UMOS)is proposed and compared with conventional trench MOSFET(CT-UMOS)in this work.The adv...A 4H-SiC trench gate metal-oxide-semiconductor field-effect transistor(UMOSFET)with semi-super-junction shiel-ded structure(SS-UMOS)is proposed and compared with conventional trench MOSFET(CT-UMOS)in this work.The advantage of the proposed structure is given by comprehensive study of the mechanism of the local semi-super-junction structure at the bottom of the trench MOSFET.In particular,the influence of the bias condition of the p-pillar at the bottom of the trench on the static and dynamic performances of the device is compared and revealed.The on-resistance of SS-UMOS with grounded(G)and ungrounded(NG)p-pillar is reduced by 52%(G)and 71%(NG)compared to CT-UMOS,respectively.Additionally,gate ox-ide in the GSS-UMOS is fully protected by the p-shield layer as well as semi-super-junction structure under the trench and p-base regions.Thus,a reduced electric-field of 2 MV/cm can be achieved at the corner of the p-shield layer.However,the quasi-intrinsic protective layer cannot be formed in NGSS-UMOS due to the charge storage effect in the floating p-pillar,resulting in a large electric field of 2.7 MV/cm at the gate oxide layer.Moreover,the total switching loss of GSS-UMOS is 1.95 mJ/cm2 and is reduced by 18%compared with CT-UMOS.On the contrary,the NGSS-UMOS has the slowest overall switching speed due to the weakened shielding effect of the p-pillar and the largest gate-to-drain capacitance among the three.The proposed GSS-UMOS plays an important role in high-voltage and high-frequency applications,and will provide a valuable idea for device design and circuit applications.展开更多
Thermal oxidation and hydrogen annealing were applied on a 100μm thick Al-doped p-type 4H-Si C epitaxial wafer to modulate the minority carrier lifetime,which was investigated by microwave photoconductive decay(μ-PC...Thermal oxidation and hydrogen annealing were applied on a 100μm thick Al-doped p-type 4H-Si C epitaxial wafer to modulate the minority carrier lifetime,which was investigated by microwave photoconductive decay(μ-PCD).The minority carrier lifetime decreased after each thermal oxidation.On the contrary,with the hydrogen annealing time increasing to3 hours,the minority carrier lifetime increased from 1.1μs(as-grown)to 3.14μs and then saturated after the annealing time reached 4 hours.The increase of surface roughness from 0.236 nm to 0.316 nm may also be one of the reasons for limiting the further improvement of the minority carrier lifetimes.Moreover,the whole wafer mappings of minority carrier lifetimes before and after hydrogen annealing were measured and discussed.The average minority carrier lifetime was up to 1.94μs and non-uniformity of carrier lifetime reached 38%after 4-hour hydrogen annealing.The increasing minority carrier lifetimes could be attributed to the double mechanisms of excess carbon atoms diffusion caused by selective etching of Si atoms and passivation of deep-level defects by hydrogen atoms.展开更多
基金Project supported by the National Key Research and Development Program of China (Grant Nos. 2023YFB3609500 and 2023YFB3609502)the National Natural Science Foundation of China (Grant No. 62274137)+1 种基金the Natural Science Foundation of Jiangxi Province, China (Grant No. 20232BAB202043)the Science and Technology Project of Fujian Province of China (Grant No. 2020I0001)。
文摘A minority carrier lifetime of 25.46 μs in a P-type 4H-SiC epilayer has been attained through sequential thermal oxidation and hydrogen annealing. Thermal oxidation can enhance the minority carrier lifetime in the 4H-SiC epilayer by reducing carbon vacancies. However, this process also generates carbon clusters with limited diffusivity and contributes to the enlargement of surface pits on the 4H-SiC. High-temperature hydrogen annealing effectively reduces stacking fault and dislocation density. Moreover, electron spin resonance analysis indicates a significant reduction in carbon vacancy defects after hydrogen annealing. The mechanisms of the elimination of carbon vacancies by hydrogen annealing include the decomposition of carbon clusters formed during thermal oxidation and the low-pressure selective etching by hydrogen,which increases the carbon content on the 4H-SiC surface and facilitates carbon diffusion. Consequently, the combination of thermal oxidation and hydrogen annealing eliminates carbon vacancies more effectively, substantially enhancing the minority carrier lifetime in P-type 4H-SiC. This improvement is advantageous for the application of high-voltage SiC bipolar devices.
基金supported by the National Natural Science Foundation of China(Grant No.62104222)the Natural Science Foundation of Fujian Province of China for Distinguished Young Scholars(Grant No.2020J06002)+3 种基金the Science and Technology Project of Fujian Province of China(Grant No.2020I0001)the Science and Technology Key Projects of Xiamen(Grant No.3502ZCQ20191001)Shenzhen Science and Technology Program(Grant No.JSGG20201102-155800003)Jiangxi Provincial Natural Science Foundation(Grant No.20212ACB212005).
文摘A 4H-SiC trench gate metal-oxide-semiconductor field-effect transistor(UMOSFET)with semi-super-junction shiel-ded structure(SS-UMOS)is proposed and compared with conventional trench MOSFET(CT-UMOS)in this work.The advantage of the proposed structure is given by comprehensive study of the mechanism of the local semi-super-junction structure at the bottom of the trench MOSFET.In particular,the influence of the bias condition of the p-pillar at the bottom of the trench on the static and dynamic performances of the device is compared and revealed.The on-resistance of SS-UMOS with grounded(G)and ungrounded(NG)p-pillar is reduced by 52%(G)and 71%(NG)compared to CT-UMOS,respectively.Additionally,gate ox-ide in the GSS-UMOS is fully protected by the p-shield layer as well as semi-super-junction structure under the trench and p-base regions.Thus,a reduced electric-field of 2 MV/cm can be achieved at the corner of the p-shield layer.However,the quasi-intrinsic protective layer cannot be formed in NGSS-UMOS due to the charge storage effect in the floating p-pillar,resulting in a large electric field of 2.7 MV/cm at the gate oxide layer.Moreover,the total switching loss of GSS-UMOS is 1.95 mJ/cm2 and is reduced by 18%compared with CT-UMOS.On the contrary,the NGSS-UMOS has the slowest overall switching speed due to the weakened shielding effect of the p-pillar and the largest gate-to-drain capacitance among the three.The proposed GSS-UMOS plays an important role in high-voltage and high-frequency applications,and will provide a valuable idea for device design and circuit applications.
基金Project supported by Key Area Research and Development Project of Guangdong Province,China(Grant No.2020B010170002)the Science Challenge Project(Grant No.TZ2018003-1-101)+4 种基金the Natural Science Foundation of Fujian Province of China for Distinguished Young Scholars(Grant No.2020J06002)the Science and Technology Project of Fujian Province of China(Grant No.2020I0001)the Fundamental Research Funds for the Central Universities(Grant Nos.20720190049 and 20720190053)the Science and Technology Key Projects of Xiamen(Grant No.3502ZCQ20191001)the National Natural Science Foundation of China(Grant No.51871189)。
文摘Thermal oxidation and hydrogen annealing were applied on a 100μm thick Al-doped p-type 4H-Si C epitaxial wafer to modulate the minority carrier lifetime,which was investigated by microwave photoconductive decay(μ-PCD).The minority carrier lifetime decreased after each thermal oxidation.On the contrary,with the hydrogen annealing time increasing to3 hours,the minority carrier lifetime increased from 1.1μs(as-grown)to 3.14μs and then saturated after the annealing time reached 4 hours.The increase of surface roughness from 0.236 nm to 0.316 nm may also be one of the reasons for limiting the further improvement of the minority carrier lifetimes.Moreover,the whole wafer mappings of minority carrier lifetimes before and after hydrogen annealing were measured and discussed.The average minority carrier lifetime was up to 1.94μs and non-uniformity of carrier lifetime reached 38%after 4-hour hydrogen annealing.The increasing minority carrier lifetimes could be attributed to the double mechanisms of excess carbon atoms diffusion caused by selective etching of Si atoms and passivation of deep-level defects by hydrogen atoms.
