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Effects of Annealing Temperature on the Structural,Optical,and Electrical Properties of ZnO Thin Films Grown on n-Si<100>Substrates by the Sol–Gel Spin Coating Method 被引量:4
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作者 Aniruddh Bahadur Yadav Amritanshu Pandey s.jit 《Acta Metallurgica Sinica(English Letters)》 SCIE EI CAS CSCD 2014年第4期682-688,共7页
The effects of annealing temperature on the sol–gel-derived ZnO thin films deposited on n-Sh100 i substrates by sol–gel spin coating method have been studied in this paper.The structural,optical,and electrical prope... The effects of annealing temperature on the sol–gel-derived ZnO thin films deposited on n-Sh100 i substrates by sol–gel spin coating method have been studied in this paper.The structural,optical,and electrical properties of ZnO thin films annealed at 450,550,and 650 °C in the Ar gas atmosphere have been investigated in a systematic way.The XRD analysis shows a polycrystalline nature of the films at all three annealing temperatures.Further,the crystallite size is observed to be increased with the annealing temperature,whereas the positions of various peaks in the XRD spectra are found to be red-shifted with the temperature.The surface morphology studied through the scanning electron microscopy measurements shows a uniform distribution of ZnO nanoparticles over the entire Si substrates of enhanced grain sizes with the annealing temperature.Optical properties investigated by photoluminescence spectroscopy shows an optical band gap varying in the range of 3.28–3.15 eV as annealing temperature is increased from 450 to 650 °C,respectively.The fourpoint probe measurement shows a decrease in resistivity from 2:1 10 2to 8:1 10 4X cm with the increased temperature from 450 to 650 °C.The study could be useful for studying the sol–gel-derived ZnO thin film-based devices for various electronic,optoelectronic,and gas sensing applications. 展开更多
关键词 Nanocrystalline ZnO thin film Sol–gel Annealing Surface morphology Photoluminescence(PL) Resistivity Grain size
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On-current modeling of short-channel double-gate(DG) MOSFETs with a vertical Gaussian-like doping profile 被引量:2
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作者 Sarvesh Dubey Pramod Kumar Tiwari s.jit 《Journal of Semiconductors》 EI CAS CSCD 2013年第5期46-53,共8页
An analytic drain current model is presented for doped short-channel double-gate MOSFETs with a Gaussian-like doping profile in the vertical direction of the channel. The present model is valid in linear and satura- t... An analytic drain current model is presented for doped short-channel double-gate MOSFETs with a Gaussian-like doping profile in the vertical direction of the channel. The present model is valid in linear and satura- tion regions of device operation. The drain current variation with various device parameters has been demonstrated. The model is made more physical by incorporating the channel length modulation effect. Parameters like transcon- ductance and drain conductance that are important in assessing the analog performance of the device have also been formulated. The model results are validated by numerical simulation results obtained by using the commercially available ATLAS^TM, a two dimensional device simulator from SILVACO. 展开更多
关键词 drain current DG MOSFET TRANSCONDUCTANCE drain conductance
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Analytical modeling of subthreshold current and subthreshold swing of Gaussiandoped strained-Si-on-insulator MOSFETs 被引量:1
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作者 Gopal Rawat Sanjay Kumar +3 位作者 Ekta Goel Mirgender Kumar Sarvesh Dubey s.jit 《Journal of Semiconductors》 EI CAS CSCD 2014年第8期52-59,共8页
This paper presents the analytical modeling of subthreshold current and subthreshold swing of short- channel fully-depleted (FD) strained-Si-on-insulator (SSOI) MOSFETs having vertical Gaussian-like doping pro- fi... This paper presents the analytical modeling of subthreshold current and subthreshold swing of short- channel fully-depleted (FD) strained-Si-on-insulator (SSOI) MOSFETs having vertical Gaussian-like doping pro- file in the channel. The subthreshold current and subthreshold swing have been derived using the parabolic approx- imation method. In addition to the effect of strain on silicon layer, various other device parameters such as channel length (L), gate-oxide thickness (tox), strained-Si channel thickness (ts_Si), peak doping concentration (Np), project range (Rp) and straggle (op) of the Gaussian profile have been considered while predicting the device characteris- tics. The present work may help to overcome the degradation in subthreshold characteristics with strain engineering. These subthreshold current and swing models provide valuable information for strained-Si MOSFET design. Ac- curacy of the proposed models is verified using the commercially available ATLASTM, a two-dimensional (2D) device simulator from SILVACO. 展开更多
关键词 strained-Si-on-insulator (SSOI) Poisson's solution short-channel-effects
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A p-silicon nanowire/n-ZnO thin film heterojunction diode prepared by thermal evaporation
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作者 Purnima Hazra s.jit 《Journal of Semiconductors》 EI CAS CSCD 2014年第1期22-26,共5页
This paper represents the electrical and optical characteristics of a SiNW/ZnO heterojunction diode and subsequent studies on the photodetection properties of the diode in the ultraviolet (UV) wavelength region. In ... This paper represents the electrical and optical characteristics of a SiNW/ZnO heterojunction diode and subsequent studies on the photodetection properties of the diode in the ultraviolet (UV) wavelength region. In this work, silicon nanowire arrays were prepared on p-type (100)-oriented Si substrate by an electroless metal deposition and etching method with the help of ultrasonication. After that, catalyst-free deposition of zinc oxide (ZnO) nanowires on a silicon nanowire (SiNW) array substrate was done by utilizing a simple and cost-effective thermal evaporation technique without using a buffer layer. The SEM and XRD techniques are used to show the quality of the as-grown ZnO nanowire film. The junction properties of the diode are evaluated by measuring current-voltage and capacitance-voltage characteristics. The diode has a well-defined rectifying behavior with a rectification ratio of 190 at -t-2 V, turn-on voltage of 0.5 V, and barrier height is 0.727 eV at room temperature under dark conditions. The photodetection parameters of the diode are investigated in the bias voltage range of ± 2 V. The diode shows responsivity of 0.8 A/W at a bias voltage of 2 V under UV illumination (wavelength = 365 nm). The characteristics of the device indicate that it can be used for UV detection applications in nano-optoelectronic and photonic devices. 展开更多
关键词 silicon nanowire ZnO nanowire heterojunction diode INTERFACE barrier height photo responsivity
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