期刊文献+
共找到2篇文章
< 1 >
每页显示 20 50 100
Volatile and non-volatile nano-electromechanical switches fabricated in a CMOS-compatible silicon-on-insulator foundry process
1
作者 Yingying Li Simon J.Bleiker +9 位作者 Elliott Worsey Maël Dagon pierre edinger Alain Yuji Takabayashi Niels Quack Peter Verheyen Wim Bogaerts Kristinn B.Gylfason Dinesh Pamunuwa Frank Niklaus 《Microsystems & Nanoengineering》 2025年第4期75-85,共11页
Nanoelectromechanical(NEM)switches have the advantages of zero leakage current,abrupt switching characteristics,and harsh environmental capabilities.This makes them a promising component for digital computing circuits... Nanoelectromechanical(NEM)switches have the advantages of zero leakage current,abrupt switching characteristics,and harsh environmental capabilities.This makes them a promising component for digital computing circuits when high energy efficiency under extreme environmental conditions is important.However,to make NEM-based logic circuits commercially viable,NEM switches must be manufacturable in existing semiconductor foundry platforms to guarantee reliable switch fabrication and very large-scale integration densities,which remains a big challenge.Here,we demonstrate the use of a commercial silicon-on-insulator(SOI)foundry platform(iSiPP50G by IMEC,Belgium)to implement monolithically integrated silicon(Si)NEM switches.Using this SOI foundry platform featuring sub-200 nm lithography technology,we implemented two different types of NEM switches:(1)a volatile 3-terminal(3-T)NEM switch with a low actuation voltage of 5.6 V and(2)a bi-stable 7-terminal(7-T)NEM switch,featuring either volatile or non-volatile switching behavior,depending on the switch contact design.The experimental results presented here show how an established CMOS-compatible SOI foundry process can be utilized to realize highly integrated Si NEM switches,removing a significant barrier towards scalable manufacturing of high performance and high-density NEMbased programmable logic circuits and non-volatile memories. 展开更多
关键词 silicon insulator non volatile CMOS compatible VOLATILE high energy efficiency extreme environmental conditions digital computing circuits foundry process semiconductor foundry platforms
原文传递
Wafer-level hermetically sealed silicon photonic MEMS
2
作者 Gaehun Jo pierre edinger +13 位作者 Simon J.Bleiker Xiacxjing Wang Alain Yuji Takabayashi Hamed Sattari Niels Quack Moises Jezzini Jun Su Lee Peter Verheyen Iman Zand Umar Khan Wim Bogaerts Göran Stemme Kristinn B.Gylfason Frank Niklaus 《Photonics Research》 SCIE EI CAS CSCD 2022年第2期I0001-I0008,共8页
The emerging fields of silicon(Si) photonic micro–electromechanical systems(MEMS) and optomechanics enable a wide range of novel high-performance photonic devices with ultra-low power consumption, such as integrated ... The emerging fields of silicon(Si) photonic micro–electromechanical systems(MEMS) and optomechanics enable a wide range of novel high-performance photonic devices with ultra-low power consumption, such as integrated optical MEMS phase shifters, tunable couplers, switches, and optomechanical resonators. In contrast to conventional SiO;-clad Si photonics, photonic MEMS and optomechanics have suspended and movable parts that need to be protected from environmental influence and contamination during operation. Wafer-level hermetic sealing can be a cost-efficient solution, but Si photonic MEMS that are hermetically sealed inside cavities with optical and electrical feedthroughs have not been demonstrated to date, to our knowledge. Here, we demonstrate wafer-level vacuum sealing of Si photonic MEMS inside cavities with ultra-thin caps featuring optical and electrical feedthroughs that connect the photonic MEMS on the inside to optical grating couplers and electrical bond pads on the outside. We used Si photonic MEMS devices built on foundry wafers from the iSiPP50G Si photonics platform of IMEC, Belgium. Vacuum confinement inside the sealed cavities was confirmed by an observed increase of the cutoff frequency of the electro-mechanical response of the encapsulated photonic MEMS phase shifters, due to reduction of air damping. The sealing caps are extremely thin, have a small footprint, and are compatible with subsequent flip-chip bonding onto interposers or printed circuit boards. Thus, our approach for sealing of integrated Si photonic MEMS clears a significant hurdle for their application in high-performance Si photonic circuits. 展开更多
关键词 sealed SEALING BONDING
原文传递
上一页 1 下一页 到第
使用帮助 返回顶部