Technology roadmaps have been a part of the semiconductor industry for many years.The first roadmap was Moore’s law,which started as an empirical observation that competitive forces then turned into a prediction that...Technology roadmaps have been a part of the semiconductor industry for many years.The first roadmap was Moore’s law,which started as an empirical observation that competitive forces then turned into a prediction that became an industry roadmap.Then the ITRS roadmap was developed and for many years was used by leading edge semiconductor producers to drive new technology they needed.Now there is the IRDS roadmap,which projects semiconductor end user requirements and develops a technology roadmap based on those requirements.The 2017 IRDS roadmap was just released.To prepare the roadmap,we received input from experts around the world.The roadmap predicts that the requirements of high performance logic will drive the development of different device structures in logic chips.Memory technology will also advance but is more focused on cost than high performance logic is.Because of this,there may be a split in the patterning roadmaps for different types of devices.Logic will adopt EUV and its extensions,while flash memory will consider nanoimprint.Directed self-assembly and direct write e-beam are also being developed.DSA has the potential to improve CD uniformity and lower costs.Direct write e-beam promises to make personalization of chips more feasible.DRAM memory will trail logic in critical dimensions and will adopt EUV when it becomes cost effective.The lithography community will both have to make EUV work and overcome the challenges of randomness in CDs and resist performance,while memory will try to make nanoimprint a reliable and low defect method of patterning.Long term,logic is expected to start focusing on 3D architectures in the late 2020’s.This will put a tremendous stress on the yield of patterning processes and on reducing the number of process steps that are required.It will also put more focus on hole type patterns,which will become one of the key patterning challenges in the future.展开更多
Decades of progress in the semiconductor industry has led to lithographically printed dimensions that are small enough that the positions of individual molecules and the stochastic variation in the number of photons h...Decades of progress in the semiconductor industry has led to lithographically printed dimensions that are small enough that the positions of individual molecules and the stochastic variation in the number of photons have a significant effect on the quality of photoresist patterns.These effects scale badly and will be more important as feature sizes continue to shrink.Selforganizing materials can provide regular patterns of molecules that have the potential to minimize stochastic effects.Some such reported materials are block copolymers,bottle brush polymers and DNA,all of which have been used as part of lithographic patterning.A key challenge for selforganizing materials is defect levels.The energy to rearrange has to be high enough that random defects aren’t created thermally but low enough that rearrangement into preferred domains can occur.All of the methods can generate accurate CDs based on the chemical composition of the material,but they all need some way to control the positions of the feature edges.There are methods for guiding the self-organization,but the final position is the sum of the guide pattern misalignment and the intrinsic alignment error of the self-organizing materials.Thus it can be worse than the positioning of the guide structures.Alignment and defect levels are thus two big challenges for manufacturing introduction of self-organizing materials.展开更多
文摘Technology roadmaps have been a part of the semiconductor industry for many years.The first roadmap was Moore’s law,which started as an empirical observation that competitive forces then turned into a prediction that became an industry roadmap.Then the ITRS roadmap was developed and for many years was used by leading edge semiconductor producers to drive new technology they needed.Now there is the IRDS roadmap,which projects semiconductor end user requirements and develops a technology roadmap based on those requirements.The 2017 IRDS roadmap was just released.To prepare the roadmap,we received input from experts around the world.The roadmap predicts that the requirements of high performance logic will drive the development of different device structures in logic chips.Memory technology will also advance but is more focused on cost than high performance logic is.Because of this,there may be a split in the patterning roadmaps for different types of devices.Logic will adopt EUV and its extensions,while flash memory will consider nanoimprint.Directed self-assembly and direct write e-beam are also being developed.DSA has the potential to improve CD uniformity and lower costs.Direct write e-beam promises to make personalization of chips more feasible.DRAM memory will trail logic in critical dimensions and will adopt EUV when it becomes cost effective.The lithography community will both have to make EUV work and overcome the challenges of randomness in CDs and resist performance,while memory will try to make nanoimprint a reliable and low defect method of patterning.Long term,logic is expected to start focusing on 3D architectures in the late 2020’s.This will put a tremendous stress on the yield of patterning processes and on reducing the number of process steps that are required.It will also put more focus on hole type patterns,which will become one of the key patterning challenges in the future.
文摘Decades of progress in the semiconductor industry has led to lithographically printed dimensions that are small enough that the positions of individual molecules and the stochastic variation in the number of photons have a significant effect on the quality of photoresist patterns.These effects scale badly and will be more important as feature sizes continue to shrink.Selforganizing materials can provide regular patterns of molecules that have the potential to minimize stochastic effects.Some such reported materials are block copolymers,bottle brush polymers and DNA,all of which have been used as part of lithographic patterning.A key challenge for selforganizing materials is defect levels.The energy to rearrange has to be high enough that random defects aren’t created thermally but low enough that rearrangement into preferred domains can occur.All of the methods can generate accurate CDs based on the chemical composition of the material,but they all need some way to control the positions of the feature edges.There are methods for guiding the self-organization,but the final position is the sum of the guide pattern misalignment and the intrinsic alignment error of the self-organizing materials.Thus it can be worse than the positioning of the guide structures.Alignment and defect levels are thus two big challenges for manufacturing introduction of self-organizing materials.
