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Technology innovations and process integrations for sub-100nm gate patterning
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作者 MeihuaShen WilfredPau +6 位作者 NicolasGani JianpingWen ShashankDeshmukh ThorstenLill JianZhang hanmingwu GuqingXing 《半导体技术》 CAS CSCD 北大核心 2004年第8期74-79,共6页
This paper presents a brief overview of the Applied Centura?DPS?system,configured with silicon etch DPS II chamber, with emphasis on discussing tuning capability for CD uniformity control. It also presents the studies... This paper presents a brief overview of the Applied Centura?DPS?system,configured with silicon etch DPS II chamber, with emphasis on discussing tuning capability for CD uniformity control. It also presents the studies of etch process chemistry and film integration impact for an overall successful gate patterning development. Discussions will focus on resolutions to key issues, such as CD uniformity, line-edge roughness, and multilayer film etching integration. 展开更多
关键词 DPS 硅刻蚀 多层薄膜 CD控制 LER
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