摘要
如何实现同步时序电路的初始化是时序电路测试中的关键问题。本文针对时序电路的初始化提出了一种新的方法。在电路初始状态未知的情况下 ,用逻辑初始化方式 ,通过采用蚂蚁算法生成最短的测试序列 ,最大限度地初始化电路的触发器。实验结果表明 ,在耗费极少时间及占用很小内存的情况下 ,针对ISCAS’89(包括Addendum’93 )
How to implement the initialization for synchronous sequential circuits is a important issue. This paper presents a new approach to the automated generation of an initialization sequence for synchronous sequential circuits. The initialization state of a circuit is often unknown, and it has to be driven to a known state. We use ant algorithm in our logical initialization to achieve initialization sequence to initialize flip flops The experimental results we provide show that the approach can achieve good results for ISCAS89 benchmark set including Addendum93 set with few CPU time and memory requirements
出处
《电子测量与仪器学报》
CSCD
2002年第4期33-39,共7页
Journal of Electronic Measurement and Instrumentation
基金
国家自然科学基金资助 (No :.60 2 660 0 1 )
国防跨行业基金资助 (No:0 0J1 7 1 5DZ0 5 0 3 )
关键词
蚂蚁算法
同步时序电路
初始化
触发器
Ant algorithm, sequential circuits, flip-flop, initialization.