摘要
为了克服单片机固有的缺陷,并使程序设计易读、易扩展,提出了一种基于FPGA+SJA1000方案的CAN总线通信实现方法。该方法使用状态机设计CAN总线的初始化过程和数据收发过程,并有独立的数据通道状态机单元满足SJA1000读写时序的要求。测试结果表明,该方案可以稳定可靠地实现CAN总线通信。与传统的单片机方案相比,该方案扩展性好、稳定性高,并降低了体积、重量和功耗;与现有的FPGA方案相比,程序设计易读、易扩展,当双方通信协议发生变化时,只需修改相应的状态机便可适应新的协议要求,具有很高的灵活性。
In order to overcome the inherent shortcomings of MCU and make the software design easy to understand and expand ,this paper presents a new method to implement CAN bus communication in FPGA based on FPGA ＋ SJA1000 architecture .This method utilizes state machine to design the initialization ,data receiving and data sending of CAN bus communication .It also has an independent data channel module to meet the timing requirement between FPGA and SJA1000 .Test results show that this CAN bus communication system is able to work stably and reliably .Compared with conventional designs based on MCU ,this system has lower volume ,weight and power consumption ,and is also more steady and easier to expand ;compared with existing designs based on FPGA＋ SJA1000 architecture ,its software design is easier to understand and expand .Additionally ,this design proves to be flexible and easily modified w hen com‐munication needs call for changes .
出处
《国外电子测量技术》
2015年第3期64-68,共5页
Foreign Electronic Measurement Technology
基金
国家863计划(2013AA122102)项目
